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This presentation provides an overview of the LHC (Large Hadron Collider) magnet powering system and its interlocks, including the main functionalities and implementation of protection functions. It also covers the link to the Beam Interlock System and the main control and data acquisition systems. Participants will have a hands-on experience in the CCC (Control Command and Communication) LHC magnet powering system.
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Introduction to the LHC magnet protection I. Romera Ramirez on behalf of the Magnet Interlocks team PLC/COTS based Interlock and Protection Systems 1st-2nd February 2016
Outline • Introduction to the LHC magnet powering system • Magnet powering interlocks • Main functionalities • Implementation of the protection functions • Link to the Beam Interlock System • Main control and data acquisition systems • SCADA supervision, Post-Mortem, Logging, Alarms… • Hands-on in the CCC
LHC magnet powering system • LHC is mainly a superconducting machine (>10000 sc magnets powered in 1600 circuits / 148 nc magnets powered in 48 circuits) • The total energy stored in the magnet circuits is about 9GJ • Due to large stored energies in magnet powering the LHC powering has been divided into 8 sectors and 28 powering subsectors • Advantages: Simplifies installation, commissioning and operation • Disadvantages: Larger equipment inventory, need for tracking between sectors, etc… • Due to its complexity and the requirement for flexibility (not all powering failures require beam dumps), the Powering Interlock System is decoupled from the Beam Interlock System
Magnet protection within the MPS The Powering Interlock System is the only interface between the magnet powering systems and the Beam Interlock System
Magnet powering interlocks • Ensure correct powering conditions for the LHC sc magnet circuits during all phases of operation (~1600 electrical circuits with 10000 sc magnets) • Interfaces with Quench Protection and Power Converters(several 1000s of channels each) andtechnical infrastructure and safety systems (Cryogenics, UPS, AUG, Access and Controls) • Handling very large stored energies (GJ), system must be fast and reliable • Distributed system installed close to main clients => EMC and radiation tolerant design • Represents 20% of the user inputs to the Beam Interlock System (BIS) => dependable design
Layout 28 powering subsectors 36 Powering Interlock Controllers Hardwired current loops for critical functions
Main functionalities • The Powering Interlock System (PIC) assures that all conditions for safe magnet powering are met • HW interlocks for safety critical functions during operation (i.e. quenches) • SW interlocks for less critical actions during start-up (i.e. heaters, communication issues…) • Protection on a circuit by circuit basis, exchanging up to 4 protection signals with power converter and QPS • Additional protection mechanisms on a powering subsector basis • Linking magnet powering to technical services & safety systems (Cryogenics, UPS, AUG and Access) • Interface magnet powering systems to the Beam Interlock system • Provide the evidence of powering failures to the operators
PIC DFB Magnet Circuit level interlocks Cryostat Magnet Magnet … PC_PERMIT QPS PC PC_FAST_ABORT CIRCUIT_QUENCH POWERING_FAILURE PC_DISCHARGE_REQUEST DISCHARGE_REQUEST • No direct connection Magnet Protection – PC, but use of interlock controllers (PIC) • Protection signals are exchanged via hardwired current loops • Depending on stored energy, circuit complexity, QPS, etc.. in between 2-4 signals are exchanged / circuit • All conditions met for powering: PC_PERMIT • Sum of internal converter faults: POWERING_FAILURE • Magnet quench or Fast Abort from PIC:PC_FAST_ABORT • Loss of coolant:PC_DISCHARGE_REQUEST
Interlock types PC_PERMIT QPS PIC PC PC_FAST_ABORT CIRCUIT_QUENCH 13kA main + IT POWERING_FAILURE PC_DISCHARGE_REQUEST DISCHARGE_REQUEST PC_PERMIT_B1 PC PC_PERMIT_B2 QPS PIC PC Individually powered quadrupoles (IRs) PC_FAST_ABORT CIRCUIT_QUENCH POWERING_FAILURE PC_PERMIT QPS PIC PC 600A EE, 600A no EE, 600A no EE crowbar + Individually powered dipoles PC_FAST_ABORT CIRCUIT_QUENCH POWERING_FAILURE PC_PERMIT PIC PC 80-120A correctors POWERING_FAILURE 60A dipole orbit correctors No HW interlocks, but SW PERMIT via timing system, surveillance through SIS
Ex: Quench loop for the 600A with EE QPS PIC PC PC_FAST_ABORT CIRCUIT_QUENCH EDMS 368927
DFB Magnet Global interlocks Cryostat Magnet Magnet … PC QPS PC QPS PC QPS PC QPS PC_PERMIT QPS 1 PIC PC PC_FAST_ABORT CIRCUIT_QUENCH x M x N POWERING_FAILURE PC_DISCHARGE_REQUEST DISCHARGE_REQUEST • In addition to circuit/circuit treatment, global interlocks will provoke runtime aborts of ALL circuits in a subsector. Exchanged via HW or between PLC-PLC AUG_OK UPS_OK Quench_propagation CRYO_MAINTAIN
Software interlocks – Start-up QPS_OK CRYO_START CRYO SCADA QPS SCADA PIC SCADA Surface – ‘Software’ signal exchange Tunnel – Hardwired signal exchange PC_PERMIT QPS PIC PC PC_FAST_ABORT CIRCUIT_QUENCH POWERING_FAILURE PC_DISCHARGE_REQUEST DISCHARGE_REQUEST • In addition to hardwired interlocks, several software interlocks exist • Exchanged via CMW, DIP, etc between SCADA systems • Verified ONLY upon start-up, thus not provoking aborts during powering QPS_OK, CRYO_START, UPS_START, CABLE_CONNECT, CONFIG_DATA
Links with access system • Allows for short access with magnets powered at low current (useful during commissioning) • If someone access a zone under powering and circuit current is above risk limit => powering subsector will be immediately shut down Control System AccessPowering
The PIC in numbers… • Distributed systemover the whole LHC circumference • 36 industrial controllers SIEMENS PLC 319 (non-safety but optimized for speed – 1ms cycle time) • ~2000 critical hardwired current loops • ~500 electronic cards (designed in-house) • 8000 remote I/O channels using compact (non-SIEMENS) modules with 32 I/Oseach • 41 km of signal cableslinking systems to main clients (QPS and power converters) • Redundant power supplies throughout the system (known to be weakest link in terms of MTBF)
Interface to the Beam Interlock System • The PIC act as an interface between magnet powering systems and the Beam Interlock System • CPLD matrix for faster transmission of beam dump requests SIEMENS319CPU Max 16 Inputs / Patch Panel Max 96 Inputs / Total PROFIBUS MATRIX ESSENTIAL + AUXILIARY CIRCUITS ESSENTIAL CIRCUITS = UNMASKABLE BEAM DUMP REQUEST = MASKABLE BEAM DUMP REQUEST
Software and configuration • GenericprogramforPLCs and CPLDs • Reference DBas unique source of information • Configuration files for PLCs, CPLDs and SCADA generated through a dedicated script • Files signed with Cyclical Redundancy Check-CRC • CRCs verified on the SCADA • Flexibility for Commissioning • No changes during operation without repeating all commissioning procedures!!
SCADA supervision • Real time monitoring of protection systems and interlocks • Provides access to interlock event archiving • Allows masking of software interlocks (protected by role-based access control system) • Many of them provide the interface to higher level DAQ systems, e.g: Post-Mortem, Logging, Alarms…
Logging systems: Measurement and Logging • Common repository for all equipment systems, allow for direct correlation of data • Variable searches based on system/variable naming • Measurement DB: High data accuracy but data valid only for ~7 days • Logging DB: Storage guaranteed for LHC lifetime, restricted data rate, filtering
Post-Mortem (1/2) • Automated post-operational analysis of transient data recordings from LHC equipment systems, including interlock systems • Supports machine protection by helping the operations crews and experts understanding the machine performance and beam dump events and answer fundamental questions: • What happened? (i.e:the initiating event / event sequence) • Did the protection systems perform as expected? • Assist in trend analysis, statistics of machine performance, … • Every dump event is analysed and has to be understood before next injection beam is permitted • Each beam dump generates ~ 1GB of PM data which is automatically analysed in typically < 1 min
Post-Mortem (2/2) PM request through timing system
Use of data acquisition systems during HWC • A test framework is essential for the commissioning and systematic testing of accelerator equipment (i.e. during this end of year stop we will perform ~4000 interlock tests on magnet interlock systems) • ACC_TESTING orchestrates the execution of test procedures and analysis • Dedicated analysis modules collect data from different sources (i.e. Post-Mortem, Logging, …) to validate the correct behaviour of the interlocks systems Automated analysis framework ACC_TESTING framework
Mechanisms for secure configuration PVSS DB Version PLC HW CRC PLC SW CRC Version Matrix CRC Ethernet PLC PLC PLC Version PLC HW CRC PLC SW CRC PUBLISH … PROFIBUS PROFIBUS PROFIBUS matrix matrix matrix Version Matrix CRC