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The Leiden Embedded Research Center

Understand embedded systems, their design, and programming; explore LERC's focus, projects, and courses. Learn about NASA's Mars Sojourner Rover Microprocessor and current trends in CoMPSoC systems. Dive into modeling embedded systems complexities and abstract models.

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The Leiden Embedded Research Center

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  1. The Leiden Embedded Research Center Prof. Dr. Ed F. Deprettere, Dr. Bart Kienhuis Leiden Embedded Research Center (LERC) Leiden Institute of Advanced Computer Science Leiden Univerity {edd, kienhuis}@liacs.nl http://www.liacs.nl/lerc LERC's challenges 08/02/11

  2. Outline of Presentation • What is an embedded system ? • Embedded Systems design and programming approach. • Specific LERC focus and contributions. • Current LERC projects. • Courses, projects, and contact addresses. LERC's challenges 08/02/11

  3. NASA's Mars Sojourner Rover.Microprocessor: 8-bit Intel 80C85.Roversenses the environment (input signals), decides on (computes) its actions (response) in real time. A simple Embedded System LERC's challenges 08/02/11

  4. station density high in core text Central core (2km) Remote central core contains supercomputer stationation 350 km A less simple Embedded System • LOFAR • SKA • station contains • 100 LF antennas • 100 HF compound antennas Distributed hierarchical radio telescopes LERC's challenges 08/02/11

  5. First • What is an embedded system ? • Embedded Systems design and programming approach. • Specific LERC focus and contribution. • Current LERC projects. • Courses, projects, and contact address. LERC's challenges 08/02/11

  6. Definition • An Embedded System is aninformation processing system that is: • application domain specific (not general purpose) • tightly coupled to its environment Examples of application domains are: automotive, multimedia. Environment: type and properties of input/output information. Tightly coupled: environment dictates what the system’s response behavior must be. Current Embedded Systems are becoming multi-core multi-platform (sub-)systems, executing multiple independent applications, mostly in real time, and at low power consumption. LERC's challenges 08/02/11

  7. Small Systems: CoMPSoC • A relatively small Embedded System is • a multi-processor(MP)service providing resource • infrastructure organized as a system-on-chip(SoC), • in which processors are heterogeneous (programmable, • configurable, dedicated) • having a communication, synchronization, and storage • infrastructure that is built on top of a Network-on-Chip(NoC) • being capable of executing a composition(Co) of multiple • (independent) applications simultaneously. Processors run autonomously and concurrently, and are not abundant as in (homogeneous) cluster or grid computers. LERC's challenges 08/02/11

  8. P FPGA Mem Mem Mem Mem ... Communication Structure P P PE PE PE PE ... P P Identical tiles Trends in CoMPSoC ES • current state of art: co-processor • next: homogeneous multi-processors • then: heterogeneous multi-processors • finally: scalable networks • of homogeneous tiles LERC's challenges 08/02/11

  9. An Example The next generation TV will be capable of executing multipleapplications, some of which may be provided by third parties (open system). For example: movie watching, photo display, internet access, and game playing. Questions to be answered at compile- time and run-time: • Are there enough resources to execute multiple applications, • each application having a certain quality? • What can the quality be of each application to guarantee • real-time behavior? • How should the applications be simultaneously scheduled • so that resource utilizationand application quality are • maximal, at minimal cost. LERC's challenges 08/02/11

  10. Next • What is an embedded system ? • Embedded Systems design and programming approach. • Specific LERC focus and contribution. • Current projects. LERC's challenges 08/02/11

  11. Embedded Systems Modeling Embedded systems are too complex that all details can be taken into account when specifying and designing them. Abstraction is necessary; hence specifications are in terms of abstractmodels on which one can reason. However, implementations and realizations are not abstract. This gap must be closed in a way hidden to the programmer. LERC's challenges 08/02/11

  12. Models (2) How can an embedded system be modeled? ES Model = {Application Model, Architecture Model, Mapping Model} - Application : un-timed transformational task graph: deals only with ( structured) functional behavior aspects, - Architecture : timed resource graph: deals only with extra-functional performance/cost aspects, - Mapping : association of the two (independent models) together based on transformations. Includes transformations to close the gap between abstract specifications and actual implementation specifications. LERC's challenges 08/02/11

  13. Abstract Model means what? A model is not a blueprint. It approximates a system’s behavior and structure, leaving out details that do not matter for the purpose of answering questions such as: what will or should happen if … and is it consistent with what I observe from the system. In embedded systems, behavior both functional and extra-functional. LERC's challenges 08/02/11

  14. D A C data-stream data-stream B communication channel D process while(1){ read (A); read (B); execute(); write (C); } service functionality Abstract Model means what? (2) Application: processes and inter-process communication channels co-ordination (synchronization) is well defined LERC's challenges 08/02/11

  15. Abstract model is what? (3) Architecture : composition of (library) components private memory buffers processor types network service timing, cost shared memory LERC's challenges 08/02/11

  16. Abstract model is what? (4) D A C B {D, A} Mapping: relation LERC's challenges 08/02/11

  17. Application Architecture Mapping (Semi-) Automated Design Space Exploration Analysis Embedded Systems Design The given approach structures performance/cost analysis and design space exploration. LERC's challenges 08/02/11

  18. Then • What is an embedded system ? • Embedded Systems design and programming approach. • Specific LERC focus and contribution. • Current LERC projects. • Courses, projects, and contact address. LERC's challenges 08/02/11

  19. LERC’s focus and contributions Briefly stated LERC deals with • the (automatic) conversion of sequential imperative • application specifications to input-output equivalent • concurrent (parallel) specifications, • the mapping of the concurrent specifications to • multi-processor architectures, • design-space exploration, • (automatically) synthesizing application domain specific • architectures, LERC's challenges 08/02/11

  20. What does it mean? Application developers can rely on sequential imperative program specifications (C/C++/Java); they don’t know what the implementation platform will be. A translator converts such specifications to parallel specifications, possibly including corresponding target implementation platform configurations not pre-defined, using multi-objective optimization techniques. A compiler converts the parallel specifications to implementation specifications, possibly including the synthesis of the not pre-defined implementation platform configuration. LERC's challenges 08/02/11

  21. FPGA S1 S2 Process-to-FPGA CoMPSoC parallel specification Matlab/C/C++/Java for j = 1:1:N, [x(j)] = S1( ); end for i = 1:1:K, [y(i)] = S2( ); end for j = 1:1:N, for i = 1:1:K, [y(i), x(j)] = func(y(i), x(j) ); end end for i = 1:1:K, [Out(i)] = Sink( y( I ) ); end F1 F2 conversion Sink F3 F4 mapping Parameterized Nested Loop Programs LERC's challenges 08/02/11

  22. Why FPGA ? A Field Programmable Gate Array(FPGA) is a billion transistor hardware programmable, i.e.,(re-)configurable, single-chip fabric consisting of a huge amount of look-up tables,memory cells, and mesh interconnect channels. Current FPGAs include high-level functional blocks, even ISA components. An FPGA CoMPSoC is (much) more flexible, and (much) cheaper than a custom designed CoMPSoC. An FPGA CoMPSoC comprising many software and hardware processing components in a run-time re-configurable network is feasible. Limitations are only coming from restricted on-chip memory resources. LERC's challenges 08/02/11

  23. sequential process parallel specification Component Applications platform / / Mem Mem Mem Mem ... platform Communication Structure FPGA PE PE PE PE ... – Part II: applying it allThe Big Picture Sequential program → LERC's challenges 08/02/11 again CoMPSoC

  24. The Bigger Picture Application Explore, modify, select instances Library of IP cores Library of IP cores Compaan (LERC) High-level Models SESAME (UvA) Mapping Spec in XML Mapping Specification Kahn Process Network in XML Platform Spec in XML Common XML Interface RTL-level Models ESPAM (LERC) Multiprocessor System on Chip – Synthesizable VHDL and C/C++ code for processors Design of Flexible Interconnection (FLUX) Network Components (TUD) LERC's challenges 08/02/11

  25. System-Level Specification Mapping Spec in XML KPN In XML Platform Spec in XML Library of IP cores ESPAM Auxiliary files IP cores in VHDL Platform topology description C/C++ code for processors RTL-Level Specification Xilinx Platform Studio (XPS) Tool Program code Processor 2 Program code Processor 1 VirtexII-Pro FPGA Gate-Level Specification Program code Processor 3 The ESPAM Design Flow LERC's challenges 08/02/11

  26. Other platforms FPGAs are currently powerful enough to prototype CoMPSoC embedded systems, or even to serve as actual product platforms that are application domain specific. System implementation in FPGAs can be done without programmers having to deal with it. However, other – given platforms – can be target platforms as well. Examples are Intel multi-core platforms, the IBM Cell processor platform, and GPU platforms. Lerc’s approach is independent of specific target platforms, but can deal with various platforms. LERC's challenges 08/02/11

  27. Example:Motion JPEG encoder Sequence of T frames dimV Video stream M-JPEG encoded (4:2:2 YUV format) video stream JPEG encoding LERC's challenges 08/02/11 dimH

  28. M-JPEG Specification (Matlab) Parameterized [ QTables, HuffTables, TablesInfo ] = P1_l_DefaultTables( ); for k = 1:1:NumFrames, [ HeaderInfo ] = P1_l_VideoInInit( ); for j = 1:1:VNumBlocks, for i = 1:1:HNumBlocks, [ Block( j ,i ) ] = P1_l_VideoInMain( ); end end for j = 1:1:VNumBlocks, for i = 1:1:HNumBlocks, [ Block( j , i ) ] =DCT( Block( j , i ) ); end end for j = 1:1:VNumBlocks, for i = 1:1:HNumBlocks, [ Block( j , i ) ] = Q( Block( j , i ), QTables ); [ Packets ] = VLE( Block( j , i ), HuffTables ); [ ] =P1_l_VideoOut( HeaderInfo, TablesInfo, Packets ); end end end %parameter NumFrames 1 1000; %parameter VNumBlocks 16 256; %parameter HNumBlocks 8 256; Block( j , i ) LERC's challenges 08/02/11

  29. Application In Matlab Block Block Q VLE DCT Compaan Compiler HuffTables QTables Packets Block struct Block { P1 int Y1[64]; /* block 8x8 pixels */ int Y2[64]; /* block 8x8 pixels */ int U[64]; /* block 8x8 pixels */ int V[64]; /* block 8x8 pixels */ }; Deriving the M-JPEG Model LERC's challenges 08/02/11

  30. Block Block Q VLE DCT HuffTables QTables Block Block Packets Block Q VLE DCT P1 HuffTables QTables Packets Block P1 PPC1 B1 FIFO0 FIFO0 PPC1 B1 FIFO1 FIFO2 VB1 VB3 PPC2 B2 FIFO0 FIFO0 PPC2 B2 VB4 VB2 Mapping LERC's challenges 08/02/11

  31. Finally • What is an embedded system ? • Embedded Systems design and programming approach. • Specific LERC focus and contribution. • Current LERC projects. • Courses, projects, and contact address. LERC's challenges 08/02/11

  32. Current projects • Compaan (sponsor: LIACS, Compaan B.V.) • ESPAM (Sponsor: Progress; Leiden, Amsterdam, Delft) • Neva (Sponsor: Europe; several companies, universities) • SoftSoc (Sponsor: Europe; several companies, universities) • Trader (Sponsor: Embedded Systems Institute, • in co-operation with companies and universities) • Daedalus (Sponsor: Progress+; Chess B.V., Compaan B.V.) Compaan (our own company) provides a framework (set of tools) that convert sequential imperative application specifications (C, C++, Java) to platform independent input-output equivalent parallel (dataflow) specifications. LERC's challenges 08/02/11

  33. Current projects (2) • Compaan (sponsor: LIACS, Compaan B.V.) • ESPAM (Sponsor: Progress) • Neva (Sponsor: Europe) • SoftSoc (Sponsor: Europe) • Trader (Sponsor: Embedded Systems Institute) • Daedalus (Sponsor: Progress+, Chess B.V., Compaan • B.V.) ESPAM is a framework (tool-set) that converts sequential imperative application specifications to input-output equivalent parallel dataflow specifications, and maps them to FPGA CoMPSoC implementation platforms. Parallelization and platform details are hidden to the programmer. LERC's challenges 08/02/11

  34. Current projects (3) • Compaan (sponsor: LIACS, Compaan B.V.) • ESPAM (Sponsor: Progress) • Neva (Sponsor: Europe) • SoftCore (Sponsor: Europe) • Trader (Sponsor: Embedded Systems Institute) • Daedalus (Sponsor: Progress+, Chess B.V., Compaan • B.V.) Neva integrates Compaan and ESPAM into a commercially available single processor compiler (ACE) to extend it to compilation of parallel applications for multi-processor platform implementations. Platforms are (multi)-FPGAs, Intel multi-core platforms, the IBM Cell processor platform, and GPU platforms. LERC's challenges 08/02/11

  35. Current projects (4) • Compaan (sponsor: LIACS, Compaan B.V.) • ESPAM (Sponsor: Progress) • Neva (Sponsor: Europe) • SoftCore (Sponsor: Europe) • Trader (Sponsor: Embedded Systems Institute) • Daedalus (Sponsor: Progress+, Chess B.V., Compaan • B.V.) Trader deals with hardware assisted Quality of Service (QoS) issues: Deadlock detection and resolving, Simultaneous execution of multiple applications (entering and leaving at arbitrary time instants), Resource management, Real-Time requirements, etc. LERC's challenges 08/02/11

  36. Current projects (5) • Compaan (sponsor: LIACS, Compaan B.V) • ESPAM (Sponsor: Progress) • Neva (Sponsor: Europe) • SoftCore (Sponsor: Europe) • Trader (Sponsor: Embedded Systems Institute) • Daedalus (Sponsor: Progress+, Chess B.V., Compaan • B.V.) Daedalus is an open source framework providing a complete embedded systems design flow. It consists of a design space exploration infrastructure to arrive at optimal combinations of application, architecture, and mapping models, followed by an ESPAM programming infrastructure. LERC's challenges 08/02/11

  37. For your Information • What is an embedded system ? • Embedded Systems design and programming approach. • Specific LERC’s focus and contribution. • Current LERC projects. • Courses, projects, and contact address. LERC's challenges 08/02/11

  38. Courses, projects, & contacts • Courses: • Digital Design (Dite)(Dr. Todor Stefanov) • Embedded Systems (Embsyst) (Prof. Ed F. Deprettere) • Software Practice (Prof. Bart Kienhuis) • ProgramAnalysis and Transformation • (PAT) (Dr. Sven Verdoolaege) • Projects: • bachelor projects • master projects • ph.d. projects Contact edd@liacs.nl kienhuis@liacs.nl LERC's challenges 08/02/11

  39. Thanks to • Prof. Ed F. Deprettere • Prof. Bart Kienhuis • Dr. Todor Stefanov • Dr. Sven Verdoolaege • Dr. Alexandru Turjan • Ph.D. student Claudiu Zissulescu • Ph.D. student Vladimir Zirkovic • Ph.D. Student Hristo Nikolov • Ph.D. Student Sjoerd Meijer • Ph. D. Student Jerome Lemaitre • Ph. D. Student Bin Jiang • Ph. D. student Dmitriy Nadezhkin LERC's challenges 08/02/11

  40. Review You can go through this presentation again at http://www.liacs.nl/~cserc/EMBSYST/EMBSYST2008/challenges/ LERC's challenges 08/02/11

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