Local and Metroplitan Area Networks (I-7000)

1. Local and Metroplitan Area Networks(I-7000) Professor Tarek Saadawi Rm 529 X7263 Office Hours: Thursday 12 – 1:30 Also random in Tuesday

2. Introduction to Digital/Data Communications Systems I(t) x(t) ~I(t) Transmitter channel r(t) Receiver Output Device Input Code [ A 1 0 0 0 0 0 1 ] Encode Modulation, amplification, Fitering Fig 1 Basic Model For a Communication System I (t) = Analog Digital X (t) = Analog Digital

8. Transmitter’ Clock Time 0 0 1 0 Transmitted’ signal ----------------------------------------------------------------------------- ----------------------------------------------------------------------------- ----------------------------------------------------------------------------- ----------------------------------------------------------------------------- ----------------------------------------------------------------------------- ----------------------------------------------------------------------------- x x x x x x Receiver with Fast Clock 0 0 1 1 0 x x x x Receiver with Slow Clock 0 1 0 Figure 2.6 Problems caused by Clock Drift

9. ASYNCHRONOUS SYNCHRONOUS 20 mA current loop BISYNC EIA RS 232C HDLC Serial EIA RS-422, 423, 499 ISDN LAP-d EIA RS 485 IEEE 802 standards _ Parallel IEEE STD 488 – 1978 Microprocessor Interfaces _ Figure 2.9 Typical data transfer interfaces

10. Bit stream to be transmitted b(t) transmitted signal d(t) b(t) Encoder Decoder transmission link Figure 2.10 bits are encoded digital signaling Bit stream to be transmitted b(t) transmitted signal a(t) b(t) Modulator Demodulator transmission link Figure 2.11 bits are modulated into analog signaling

11. 1 0 0 1 1 0 1 Bit stream to be transmitted +v 0 RZ -v Leads to out of synch, DC voltage, +v NRZ -v Differential encoding; comparing the polarity of adjacent bits, more reliable to detect a transition than to compare a threshold 0 NRZ1 -v Self-clocking, 2 symbols per bit (baud), 10 Mbps means 20 MBauds, η=50% Manchester

12. 1 0 0 1 1 0 1 Bit stream to be transmitted • Differential Manchester • • Alternating Mark Inversion 3-levels, binary zero is zero voltage, binary 1 alternates Duo binary “1” = previous “1” if even zeros, otherwise the complement Figure 2.12 Reasons for line coding: Freq spectrum; freq spectrum, synchronization, better performance under noisy environment

15. 0 1 0 0 1 0 1 0 b(t) X • A1 cos(wt + θ ) b(t) = 1 A2 cos(wt + θ ) b(t) = 0 N (a) ASK A cos (2πf t +θ ) frequency f1 (b) FSK A cos (2πf1 t +θ )b(t) A cos (2πf2 t +θ )b(t) frequency f2 1800 phase shift (c) PSK A cos (2πf1 t +θ )b(t) A cos (2πf2 t +1800 ) b(t) = 0 1800 phase shift

16. Figure 2.14 Digital Signal Modulation Techniques Q – PSK b(t) A cos (wt + 0 ) 0 0 A cos (wt + 90 ) 0 1 A cos (wt + 180 ) 1 1 A cos (wt + 2π ) 1 0 M-ary – PSK multiplication x(t) b(t) X N Carrier

17. Mary PSK: x(t) = A con ( 2πft + { 2πf2 / M } ) , k = 0,1,…….., M. M = 2 PSK M = 4 QPSK Type of signal transmitted Anolog Digital Information to be transmitted Anolog AM, FM, PM Modulator (transmitter) Anolog PCM, Delta Modulator Digital ASK, PSK, FSK, MSK (Moderns) RZ, NRZ, NRZ1 codec, Digital transmitter Figure 2.16 Example of Information Signaling format and the devices used.

18. G2 = 1 Input (10011) G0 = 1 G1 = 0 + + A B C G3 = 1 Shift Register G(X) = X3 + X2 + 1 XOR r = 3 0 0 0 0 1 1 1 0 1 1 1 0 Shift Register Content Step Input A B C 0 0 0 0 0 1 1 1 0 0 2 1 1 1 0 3 0 0 1 1 4 0 1 0 0 5 1 1 1 0 6 0 0 1 1 7 0 1 0 0 8 0 0 1 0