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Outline. Motivation2-1 MASH Sigma-Delta(??)Architecture and ImplementationLayoutSimulated ResultsSummary. Motivation. . . High precision ADC (14-bit). Integrating: slow, comparator offsetAlgorithmic, successive approximation: high gain op-amp, precision capacitor matching Sigma-delta(??): no
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1. BWRC Retreat Design of a 2-1 MASH Sigma-Delta ADC
Bill Tsang, Yun Chiu, Borivoje Nikolic
01/12/2004
Monterey,CA
2. Outline Motivation
2-1 MASH Sigma-Delta(??)Architecture and Implementation
Layout
Simulated Results
Summary
3. Motivation
4. ?? ADC
5. 2-1 MASH ??
7. Noise
8. Matching
9. Circuit Detail
10. Floor Plan
11. Layout (Integrator I)
12. Layout (Integrator I)
13. Simulation Results Gain errorGain error
14. Summary Effective oversampling ratioEffective oversampling ratio