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Example Application

Explore the capabilities of PSoC for LIN bus communication in motor control applications. Support, training, and roadmap provided.

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Example Application

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  1. Example Application

  2. Example Application

  3. Example Application

  4. Device Block Diagram

  5. Example Application

  6. PSoC BLDC Motor Control Brushless DC Motor Control • Sensor or Sensor-less Motor Control Configurable Motor Drive Signals • Independent High Frequency PWM outputs for precise motor control Extended Analog Peripherals for Back-EMF Sensing • Amplification • Filters • ADCs • Schmitt Triggers System Level Communications • LIN Bus 1.x & 2.x • SPI • I2C • UART

  7. PSoC LIN Bus • Features • Demonstrates the ability of PSoC to implement the LIN bus (Local Interconnect Network) standard protocol. • Demonstrates one master and two slave nodes. • Provides a flexible development environment for product creation using either slave or master LIN device applications using the PSoC. Slave LIN node

  8. Pseudo Random PWM • Features • Reduced acoustic noise from motors • Reduced peaks in electromagnetic emissions • Increased efficiency of Power FETs • Works for DC and AC Motor Control PWM Output Motor Drive Before After (70dB reduction in peak)

  9. Agenda • Cypress Overview • Cypress Automotive Group • Cypress Automotive Products • Cypress Automotive Quality • PSoC Overview • PSoC Automotive Applications • Support & Training • LIN Bus Reference Designs • PSoC Roadmap

  10. PSoC Support • Phone Support • Applications Hotline provides Live CMS applications engineer support when you need it • 1-800-669-0557 ext 4814 • 8am to 6pm Pacific Time • Online Support • Self help knowledge base • Online applications support with a 4-hour response • guarantee • User Forums • See solutions to commonly asked questions • Get answers quickly from other PSoC users • http://www.cypress.com/support/

  11. PSoC Support • Additional Support • Application Notes • Demonstration Designs • Cypress Field Application Engineers • Tele-training • LIVE Classes Weekly • Example design project completed during each class • High quality presentation is available for download • Taught by factory PSoC experts • Classes for all levels of experience

  12. PSoC Support • Cypros Consultants • 179 design consultants in 22 countries are enrolled in the Cypress MicroSystems program. The number continues to grow. • Contact information and short bio on each consultant can be viewed at: • www.cypress.com/support/cypros.cfm

  13. Agenda • Cypress Overview • Cypress Automotive Group • Cypress Automotive Products • Cypress Automotive Quality • PSoC Overview • PSoC Automotive Applications • Support & Training • LIN Bus Reference Designs • PSoC Roadmap

  14. What is ? • Local Interconnect Network for automotive applications • Defined by Audi, BMW, DaimlerChrysler, Motorola, Volkswagen, Volvo, supported by many more... • Internet : http://www.lin-subbus.org/ • Low-cost interconnecting solution, complementing existing solutions (e.g. CAN) • LIN node architecture = single-master multiple-slaves • Potential for many LIN networksper car many LIN nodes LIN network Single-master Multiple-slaves

  15. Communications Standards

  16. LIN Slave Controller Slave LIN node Voltage Regul. VBAT 5V TX PSoC LIN transceiver LIN bus RX GND • LIN transceiver converts single-wire LIN bus in two-wire (RX,TX) interface • PSoC can run without external crystal

  17. LIN Master Controller Slave LIN node Voltage Regul. VBAT 5V RT TX PSoC LIN transceiver 32KHz LIN bus RX GND • Frequency tolerance for master (±0.5%) implies use of external crystal • External pull-up LIN bus resistor (1KΩ)

  18. Lin Bus Demo Board

  19. PSoC LIN Bus Benefits • Low CPU utilization • LIN driver = 10% CPU load (peak) • 90% left for application • Minimum hardware usage • LIN hardware = 3 Digital blocks (through reconfigurability) • 5 Digital + 12 Analog blocks left for application • Full specification compliance • Compliant with LIN v1.2 specification • Works on all present and future PSoC devices • Many peripheral options • Many package/pin-count options

  20. PSoC LIN Bus Benefits • Works as master or slave node • Flexible adaptable solution • Standard is not finalized • Changes can be easily made in configuration to adapt • High precision internal oscillator makes slave design easier • No problem detecting synch break • Lower oscillator tolerance stack-up • No crystal required for slaves • Small memory requirements for LIN implementation • Code size ~1.5 KB for slave, 1 KB for master • RAM size ~30Bytes (+ message buffers)

  21. LIN Bus Reference Design Overview • LIN bus reference design created jointly by Cypress Microsystems and Crealie Logiciel Enfoui • Includes hardware board • Includes all software • Includes PSoC configurations for master and slave nodes • Demonstrates the use of PSoC in LIN applications • Has 1 master node, and 2 slave nodes • Passes simple messages to light LEDs • Packaged into reference design kit with all documentation ($195 US)

  22. PSoC Development Tools Support LIN bus • LIN Bus IP included in new versions of PSoC DesignerTM • No charges for intellectual property, royalty free • LIN Bus Reference Design available for sale • Hardware board with three LIN bus nodes • Cabling and power supply • Technical documentation

  23. Agenda • Cypress Overview • Cypress Automotive Group • Cypress Automotive Products • Cypress Automotive Quality • PSoC Overview • PSoC Automotive Applications • Support & Training • LIN Bus Reference Designs • PSoC Roadmap

  24. Production I-Temp Production Planned Qual PSoC Automotive Roadmap CY8C29x88 12 Analog 16 digital CAN Bus 64K Flash, 2K SRAM 64 I/O 125C Ambient CY8C29xxx 12 Analog, 16 Digital 32K Flash, 2K SRAM 24-64 I/O 125C Ambient CY8C27xxx 12 Analog, 8 Digital 16K Flash, 256SRAM 6-44 I/O, 105C Ambient CY8C26xxx 12 Analog, 8 Digital 16K Flash, 256 SRAM 6-44 I/O, I-Temp FEATURES/FUNCTIONS CY8C24xxx 6 Analog, 4 Digital 4K Flash, 256 SRAM 6-24 I/O, 125C Ambient CY8C21xxx 0 Analog, 4 Digital 8K Flash, 512 SRAM, 12-28 I/O 125C Ambient Q205 2006 Now Q105 Cypress Confidential

  25. PSoC1216-CANFeatures - General • Fully integrated CAN within PSoC • Implements CAN Version 2.0 (Part A, B) • Bit-rates up to 1 MBd • 32 Message Objects with Individual Acceptance Filter and Mask • Supports 11- and 29-Bit Identifiers • 64KB SONOS Flash • 2KB SRAM • CPU Speed & Temp Range • Speeds to 24 MHz (-40°C to +85°C: 5V) • Speeds to 12 MHz (-40°C to +85°C: 3.3V) • Speeds to 12 MHz (-40°C to +125°C: 5V) • Packaging • 48 Pin (300 Mil) SSOP • 100 Pin TQFP

  26. PSoC1216-CANFeatures – Detail (1) • Powerful Harvard Architecture Processor • M8C Processor Speed • Two 8x8 Multiply, 32-Bit Accumulate • Advanced Peripherals (PSoC Blocks) • 12 Rail-to-Rail Analog PSoC Blocks Provide: • Up to 14-Bit ADCs • Up to 9-Bit DACs • Programmable Gain Amplifiers • Programmable Filters and Comparators • 16 Digital PSoC Blocks Provide: • 8- to 32-Bit Timers, Counters, and PWMs • CRC and PRS Modules • Up to 4 Full-Duplex UARTs • Multiple SPI™ Masters or Slaves • Connectable to all GPIO Pins • Complex Peripherals by Combining Blocks • Flexible On-Chip Memory • 64K Bytes Flash Program Storage • 2K Bytes SRAM Data Storage • In-System Serial Programming (ISSP™) • Flexible Protection Modes

  27. PSoC1216-CANFeatures – Detail (2) • Complete Development Tools • Free Development Software (PSoC™ Designer) • Full-Featured, In-Circuit Emulator and Programmer with Trace Buffer • Precision, Programmable Clocking • Internal 24/48 MHz Oscillator • 24/48 MHz with Optional 12 MHz Crystal • Optional External Oscillator, up to 24 MHz • Internal Oscillator for Watchdog and Sleep • Programmable Pin Configurations • 25 mA Drive on all GPIO • Pull up, Pull down, High Z, Strong, or Open • Drain Drive Modes on all GPIO • Up to 12 Analog Inputs on GPIO • Four 40 mA Analog Outputs on GPIO • Configurable Interrupt on all GPIO • Additional System Resources • I2C™ Master and Slave • Watchdog and Sleep Timers • User-Configurable Low Voltage Detection • Integrated Supervisory Circuit • On-Chip Precision Voltage Reference

  28. PSoC1216-CANDevice Block Diagram

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