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HYDRIL

HYDRIL. SUBSEA CONTROL MODULE FOR OIL WELL BLOW-OUT PREVENTER (BOPs) Team 3B Matt Hewitt – Project Manager Devin Welch – Configuration Manager Paul Jaramillo – Correspondent Nhat Pham – Financial Officer. Project Requirements.

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  1. HYDRIL SUBSEA CONTROL MODULE FOR OIL WELL BLOW-OUT PREVENTER (BOPs) Team 3B Matt Hewitt – Project Manager Devin Welch – Configuration Manager Paul Jaramillo – Correspondent Nhat Pham – Financial Officer

  2. Project Requirements • Design and build an electronics module to monitor and control the operation of a single ram blow-out preventer (BOP) located sub sea. • Test the module with a set of actual or simulated control system equipment.

  3. Solenoid Control • The electronics module must independently trigger two solenoids when commanded.

  4. Continuous Monitoring • Flow (in GPM) of Hydraulic Fluid • Ram Position via LVDT • These values must be transmitted to the computer on the ship.

  5. Additional Features • Self Test Circuitry • Redundancy • Networkability for single and double ram BOPs • Functional at ambient 6700 psi

  6. Requirements met • Built prototype control module • Tested module with Hydril supplied solenoids • Continuously sampled Flowmeter and LVDT data with A/D chip

  7. Requirement work in progress • Communication with topside computer • Communication with other modules • Incorporate Self Test Circuitry • Incorporate Redundant Circuits • Functionality at 6700 psi

  8. Devin WelchConfiguration Manager

  9. Functional Block Diagram

  10. Functional Block Diagram Overview Topside Computer Input Sub sea Sensor Input Sub sea Self-Test Output Control Module Topside Computer Receiver

  11. Functional Block Diagram Inputs to Control Module Hydraulic Flow High Pressure Flow Meter 0 175 GPM Analog Data LVDT Ram Position Measurement Analog Data Power and Control Lines Analog = 52V Digital = 5V Topside Signals and Power

  12. Functional Block Diagram Control Module Flow meter Data Output Data Acquisition and Transmission LVDT Solenoid #1 Coil Output Solenoid Coil Monitoring “Self-Test” Solenoid #2 Coil Output Control Lines Solenoid #1 #1 / #2 Control Logic Solenoid Activation Solenoid Drivers 52V, 1/2A Solenoid #2 ON/OFF

  13. Functional Block Diagram Control Module Outputs Solenoid #1 Control Line Solenoid #1 Solenoid #1 Coil Output Solenoid #2 Control Line Solenoid #2 Solenoid #2 Coil Output Data Transmission Lines Computer Received Output Signals

  14. Control Module2nd Level Block Diagrams

  15. Digital Circuit Board Data Acquisition Data Out Analog Signal 0-5V A/D Converter Flow meter Control In FPGA Data Out Analog Signal 0-10V A/D Converter LVDT Control In

  16. Flowmeter A/D Converter

  17. LVDT A/D Converter

  18. Solenoid Coil Self-Test DPDT Relay Relay Coil Control Solenoid Driver Power +52V Data Out FPGA FPGA Signal +3.3V Solenoid Coil A/D 0 Control In R 0

  19. FPGA Control Logic

  20. FPGA Inputs/Outputs Digital Flow meter Data Flow meter A/D Control Solenoid #1 Control Line Digital LVDT Data LVDT A/D Control Spartan XC3S400 Digital Coil Data Solenoid #2 Control Line Coil A/D Control Topside Computer Control Lines

  21. Solenoid Drivers

  22. Solenoid Activation Analog Circuit Board FPGA Control Line #1 Vcc Gnd Solenoid Driver Solenoid #1 Driver Control line FPGA Control Line #2 Vcc Gnd Solenoid Driver Solenoid #2 Driver Control line Vcc=52V

  23. Solenoid Driver Schematic

  24. Paul JaramilloCorrespondent

  25. VHDL Structure Two Components: State Machine 16-bit Shift Register Serial In Parallel Out (SIPO)

  26. State Machine Function Table *User Specified Voltage

  27. State Machine Transition State Translation S00 Wait (Initial) S01 Close BOP S10 Open BOP S11 Not Used

  28. 16-bit Shift Register

  29. A 2 D Converter Timing

  30. Read/Convert Process

  31. A-2-D Data Latch

  32. Nhat PhamFinancial Officer

  33. Parts cost

  34. Labor cost

  35. Actual Budget

  36. Budget difference

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