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The Assemble, Unassemble commands of the debugger:. U Command for converting machine code language source. Equivalent assembly statements. A command for converting assembly statements. Equivalent machine code instructions. The Go command of the debugger:. Format
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The Assemble, Unassemble commands of the debugger: U Command for converting machine code language source Equivalent assembly statements A command for converting assembly statements Equivalent machine code instructions
The Go command of the debugger: Format G =[starting address] [breakpoint address] Execute the instructions from the starting address till the breakpoint address appears in the IP register (address of the instruction following the end of the program)
Unsigned Multiplication S is the source: R8 or R16 , M8or M16 Format MUL S Affects all flags [AL] *[S8] [AX] Action [AX] * [S16] [DX]:[AX] Affects all flags
Signed Multiplication S is the source: R8 or R16 , M8or M16 Format IMUL S Affects all flags [AL] *[S8] [AX] Action [AX] * [S16] [DX]:[AX] Affects all flags
Unsigned multiplication MOV AL, FF MOV CL,FE MUL CL [AL] = 25510 [CL] = 25410 [AX] = FD0216 = 6477010 Signed multiplication MOV AX, 00FF MOV CX,00FE IMUL CL [AL] = -110 [CL] = -210 [AX] = 000216 = 216
BCD Arithmetics MOV AL, 09 MOV CL, 08 MUL CL [AX] =48H AAMAdjust AL after multiplication Q(AL10) / 10 AH R(AL10) / 10 AL Affects all flags [AX] = 0702 Result is unpacked BCD
Unsigned Division S is the source: R8 or R16 , M8or M16 Format DIV S Affects all flags Q([AX] /[S8]) [AL] R([AX] / [S8]) [AH] If Q is ≥ FF then type 0 interrupt occurs Action Affects all flags Q(([AX]:[DX]) / [S16]) [AX] R(([DX]:[AX]) / [S16]) [DX] If Q is ≥ FFFF then type 0 interrupt occurs
Signed Division S is the source: R8 or R16 , M8or M16 Format IDIV S Affects all flags Q([AX] /[S8]) [AL] R([AX] / [S8]) [AH] If Q is ≥ 7F then type 0 interrupt occurs Action Affects all flags Q(([AX]:[DX]) / [S16]) [AX] R(([DX]:[AX]) / [S16]) [DX] If Q is7FFF then type 0 interrupt occurs
AAD Adjust AX for division This instruction assumes that AH and AL contain unpacked DCD numbers MOV AX,0702 AAD Action: [AH]10*10 + [AL]10 [AL] 00 [AH] [AL]10 [AL]16 This instruction does the opposite of AAM
MOV AX, 314E 314E16 = 1262210 MOV BL,40 4016 = 6410 IDIV BL quotient = 19710 quotient > 12710 or 7F16 divide overflow MOV AX, 0010 1016 = +1610 MOV BL,FD FD16 = -310 IDIV BL quotient in AL [AL] = -510 = FB16 residue in AH [AH] = 110 = 116
MOV AX, 3149 [AX]10 = 12617 MOV BL,04 quotient = 3154 quotient > 25510 or FF16 DIV BL divide overflow MOV AX, 314E 314E16 = 1262210 MOV BL,40 4016 = 6410 DIV BL quotient in AL [AL] = 19710 = C516 residue in AH [AH] = 1410 = E16
CBW convert byte to word Action most significant bit of AL all bits of AH does not affect any flag CWD convert word to double word Action most significant bit of AX all bits of DX does not affect any flag
MOV AL, 81 [AX] = 008116 CBW [AX] = FF8116 CWD [DX] = FFFF16 : [AX] = FF8116
The Compare Instruction Format CMP D, S Effect Affects all flags Subtraction using 2’s complement MOV AH, 00 SAHF MOV AL , 99 [AL] = 100110012 -ve 2’s complement 011001112 = - 6716 = - 10310 MOV BL , 1B [BL] = 000110112 +ve = 2710 2’s complement 111001012 CMP AL, BL 10011001+ 11100101 = 01111110 -10310 – 2710 = -13010 OV, PL, NZ, AC, PE, NC Overflow, positive, not zero, auxiliary carry, parity even, no carry
MOV AH, 00 SAHF MOV AX , 1234 [AX] = 0001 0010 0011 01002 +ve = +466010 MOV BX , 0ABCD [BX] = 1010 1011 1100 11012 -ve 2’s complement 0101 0100 0011 00112 [BX] = -2155510 CMP AX, BX 0001 0010 0011 01002 + 0101 0100 0011 00112 = 0110 0110 0110 01112 +466010– ( - 2155510) No overflow, Auxiliary carry, Carry, Not zero, Positive, Odd parity NV AC CY PL NG PO X X X PF CF AF ZF
Logic Instructions Format Operation Flags Affected D S R R AND D,S [S] . [D] [D] All Flags R M OR D,S [S] + [D] [D] All Flags M R R immediate XOR D,S [S] + [D] [D] All Flags M immediate NOT D [D] [D] No Flags Acc immediate
MOV AX,0055 [AL] = 010101012 = 5516 AND AL,1F 01010101 .00011111 [AL] = 000101012 = 1516 OR AL,C0 00010101 +11000000 [AL] = 110101012 = D516 XOR AL,0F 11010101 +00001111 [AL] = 110110102 = DA1 NOT AL [AL] = 001001012 = 2516
123416 0 0 CF 246816 0 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 0 1 0 1 1 0 1 1 0 1 0 0 0 0 0 Shift Instructions: SHL shift logical left format SHL D, Count Example: SHL AX,1
SHR shift logical right format SHL R, Count Example: SHR AX,CL [CL] = 2 SAR AX,CL [CL] = 2 123416 0 0 CF 048D16 091A16 1 024616 CF 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 0 1 1 0 0 0 0 1 1 0 0 0 0 0 1 0 0 1 0 0 1 0 0 1 0 0 1 1 1 0 1 1 0 1 0 1 0 0 0 1
0 0 CF CF 0 0 0 0 1 0 0 1 0 0 0 1 1 0 0 0 0 0 1 0 1 1 0 1 0 1 1 0 0 0 1 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 1 0 0 1 0 0 0 0 1 1 1 0 0 0 0 1 0 1 Rotate Instructions: ROL D, Count ROL AX, 1 123416 246816 ROR AX, CL [CL] = 4 123416 412316
RCL D, Count RCL AX, CL [CL] = 4 0 CF Before execution [AX] = 123416 1 CF After execution [AX] = 23 4016 0 0 0 0 1 0 0 1 0 0 0 0 1 1 0 1 0 0 1 0 0 1 0 1 0 0 1 0 0 0 0 0
0 1 0 0 0 0 0 1 0 0 0 0 0 1 0 1 0 0 0 0 1 1 0 1 0 0 1 0 1 0 1 0 RCR D, Count RCR AX, CL [CL] = 4 0 CF Before execution [AX] = 123416 0 CF After execution [AX] = 81 2316