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Semiconductor Device Modeling and Characterization – EE5342 Lecture 30 – Spring 2011. Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc/. Ideal 2-terminal MOS capacitor/diode. conducting gate, area = LW. V gate. -x ox. SiO 2. 0. y. 0. L. silicon substrate. t sub.
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Semiconductor Device Modeling and Characterization – EE5342 Lecture 30 – Spring 2011 Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc/
Ideal 2-terminalMOS capacitor/diode conducting gate, area = LW Vgate -xox SiO2 0 y 0 L silicon substrate tsub Vsub x
Band models (approx. scale) metal silicon dioxide p-type s/c Eo Eo qcox ~ 0.95 eV Eo qcSi= 4.05eV qfm= 4.1 eV for Al Ec qfs,p Eg,ox ~ 8 eV Ec EFm EFi EFp Ev Ev
Flat band condition (approx. scale) Al SiO2 p-Si q(fm-cox)= 3.15 eV q(cox-cSi)=3.1eV Ec,Ox qffp= 3.95eV EFm Ec Eg,ox~8eV EFi EFp Ev Ev
Equivalent circuitfor Flat-Band • Surface effect analogous to the extr Debye length = LD,extr = [eVt/(qNa)]1/2 • Debye cap, C’D,extr = eSi/LD,extr • Oxide cap, C’Ox = eOx/xOx • Net C is the series comb C’Ox C’D,extr
Accumulation forVgate< VFB Vgate< VFB -xox SiO2 EOx,x<0 0 holes p-type Si tsub Vsub = 0 x
References * Semiconductor Physics & Devices, by Donald A. Neamen, Irwin, Chicago, 1997. **Device Electronics for Integrated Circuits, 2nd ed., by Richard S. Muller and Theodore I. Kamins, John Wiley and Sons, New York, 1986