Taylor Expansion Diagrams (TED): Verification

1. EC667: Synthesis and Verification of Digital Systems Spring 2011 Presented by: Sudhan Taylor Expansion Diagrams (TED): Verification

2. In this presentation... • 1. What is a TED? • 2. What is the Motivation behind TED’s development? • 3. How to create a TED? • 4. How TED is used for Verification?

3. 1. Taylor Expansion Diagram • Canonical representation for arithmetic expressions useful for equivalence checking of a design among others. • Works at a higher level of abstraction. • Built on Taylor series expansion. (Representation of a function as a sum of infinite terms) f(x) is a real, differentiable function corresponding to an algebraic expression F. F1(x=0) is the first derivative of the function w.r.t x and evaluated at x0=0. F(x,y,..) = F0(x=0)+ x F1(x=0) + x2 F2(x=0) + …

4. 2. Motivation for TED Development • Size and complexity of digital designs steadily increasing. • So does the need for verification tools capable of working at higher abstraction levels. • Typically high level descriptions contain word-level arithmetic computations along with Boolean logic. • This need for canonical representations working with symbolic, algebraic word-level computations was the motivation behind creating a new representation.

5. X + Y 4 2 1 4 0 0 1 1 x2 x1 x0 y0 y1 y2 Y X 2 1 Symbolic Bit level 2. Review of Previous work • Logic of equality with uninterpreted functions. [J. Burch, ’94] • Use of Propositional logic Formula. [R. Bryant, 01] • Reduced, ordered Binary Decision Diagrams (ROBDD) and its variants. [R.E. Bryant, ‘86] • Binary Moment Diagrams. [R.E. Bryant, 95] • Symbolic Algebra Methods.[G. DeMicheli, 03] • Drawbacks: • Requires bit level functions for word level signals. • Algebra tools require canonical representations for equivalence checking.

6. 2.Reduced Ordered Binary Decision Diagrams • It represents a set of binary valued decisions in a rooted directed acyclic graph(DAG). • It is based on a recursive Shannon decomposition and has a set of reduction rules. • Advantages : • Widely available software Packages and used for combinational equivalence checking. • BDD based verification systems successful in verifying control dominated circuits. • Drawbacks: • Not successful for data path design. • With complex circuits, BDD representations face size limits.

7. 2. Binary Moment Diagrams • Performs decomposition of a linear function based on its first two moments (linear moment) and (constant moment). • Uses modified Shannon’s expansion, in which a binary variable is treated as a (0,1) integer. • Drawbacks: • For high degree polynomials defined over words with large bit-width, it becomes an expensive representation. • It has a set of restrictions imposed to make it canonical and thus makes it difficult to construct.

8. 3. Creating a TED - Basics • Notation: • f(x=0) 0-child • f’(x=0) 1-child • f’’(x=0) 2-child f(x) x 1 x x2 … f’(x) f(x) f’’(x)

9. 3. Creating a TED - Steps • 1.Start with the algebraic Expression and ordering of variables. • 2. Recursively, from F find the values for all the constant, first and second derivative terms w.r.t to each variable. • 3. Form the TED with this information based on the notation. • 4. Apply reduction rules and Normalization to get Normalized TED.

10. 3. Creating a TED - Example Arithmetic expression : F = (A+B) (A+2C) = A2 + AB + 2AC + 2BC Consider ordering : A,B,C Decomposition w.r.t A: F(A=0) = 2BC F’(A=0) = B + 2C 1/2F’’(A=0) = 1 Decomposition of G=F(A=0), H=F’(A=0), F’’(A=0) w.r.t B: G(B=0) = 0 H(B=0) = 2C G’(B=0) = 2C H’(B=0) = 1 Similarly, Decomposition w.r.t C: F(C=0) = 0 F’(C=0) = 2 F A 1 A A2 G=2BC B B H=B+2C B 1 1 B C 2C 1 C 0 2 1 From TED: F = A2+AB+2AC+2BC Every path from root node to non zero vertex is a non zero term in the expression

11. 0 u 3. Creating a TED – Reduction Rules 1. Eliminate redundant nodes: • Nodes with all non zero edges connected to terminal 0 v x f = 0 v2 + 0 v + y(u) = y(u) u y y • 2. Merge Isomorphic Graph: • Isomorphic if structure and attributes of the two TED’s match. • All 3 subgraphs are isomorphic i.e. one to one mapping between vertex sets and edge sets. ‘Taylor Expansion Diagrams: A Canonical Representation for Verification of Data Flow Designs’ – Maciej Ciesielski, Priyank kalla, Serkan Askar

12. 3. Creating a TED - Normalization • Applied to reduce the graph. • Move numeric values from nonzero terminal nodes to terminal edges. • A reduced ordered TED representation is normalized when: • The weights assigned to edges spanning Out of a node are prime. • Numeric value 0 appears only in the terminal nodes. • Graph contains no more than two terminal nodes. Applying Normalization to example F A B B C 2 0 1 2 ‘Taylor Expansion Diagrams: A Canonical Representation for Verification of Data Flow Designs’ – Maciej Ciesielski, Priyank kalla, Serkan Askar

13. 3. Creating a TED - Composition Like the apply operator in BDD, TED’s can be similarly composed, following specific rules. Starting from root node of the two TED’s, the final TED is constructed by recursively: • constructing all the non zero terms from two functions. • combining the terms according to a given operation. Rules: Case 1: Nodes w and y with same index: • 0-child is obtained by pairing 0-child of w,y. • 1-child is obtained by the sum of two cross products of 0 and 1 children. • 2-child is obtained by pairing the 1-children of w,y. Case 2: Nodes w and y with different indices: The node with the lower index is added to the 0-child of the node corresponding to variable with higher index. Case 3: Both the nodes are terminal nodes: val= val(w) + val(y) if add operation, val = val(w)*val(y) for multiplication.

14. w y x z 1 1 0 0 3. Creating a TED – Composition Example(1/2) Apply composition and verify if the final TED is the same as the one constructed by expansion of the expression. F = (A+B) (A+2C) = A2 + AB + 2AC + 2BC Ordering : A,B,C 0-child is obtained by pairing 0-child of w,y. w.y A A+B A+2C A A B 1 x.z B C * B C C 0.z 1.z C 1.z x.1 2 2 + 2 0 0 0 1 1 0 1 0 For terminal nodes, val = val(u)*val(v) 1-child is obtained by the sum of two cross products of 0 and 1 children.

15. 3. Creating a TED – Composition Example(2/2) B C B The node with the lower index is added to the 0-child of the node corresponding to variable with higher index. x.1 C 0.z 2 1 0 0 w.y The two TED’s are equal A On replacing w.y A 1 x.z B B B x.z 1.z 1.z x.1 x.1 x.1 C 0.z 1.z + + C 2 2 C 1.z 2 + 2 0 0 1 1 1 1 1 0 0 0 0 0 1 0

16. 4. TED as a tool for Verification Given RTL design, • Build TED’s for Primary Inputs • Expansion of word level signals needed • When one or more bits from i/p used in other parts of design. • Then, TED’s constructed for all components of the design. • TED’s for the primary outputs are generated by composing the TED’s in topological order from PI to PO. • After constructing normalized TED for each design, the test for functional equivalence is performed by checking for isomorphism of the resulting graphs.

17. Limitations of TED • Partitioning of word level signals into subvectors creates an issue for polynomial representation. • Only finite Taylor expansionspermitted. • They cannot represent relational operators in symbolic form. • TEDs cannot represent modular arithmetic.

18. Summary Salient features of TED: • Represents arithmetic (word-level) operators and Boolean logic. • Canonical(Based on Taylor’s theorem which states the uniqueness of the Taylor’s series representation of a function, evaluated at a particular point) • Compact(linear for polynomials) • In the worst case, TED for f requires O(kn-1) nodes and O(kn)edges. Applications Useful for High-level synthesis, equivalence checking, symbolic simulation.

19. References • Priyank Kalla, Maciej Ciesielski, Emmanuel Boutillon, Erric Martin, ‘High-Level Design Verification using Taylor Expansion Diagrams: first Results’ • Maciej Ciesielski, Priyank Kalla, Serkan Askar, ‘Taylor Expansion Diagrams: A Canonical Representation for Verification of Data Flow Designs’

20. Thank You