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Optimal Real-Time Scheduling for Uniform Multiprocessors

Optimal Real-Time Scheduling for Uniform Multiprocessors. 薛智文 助理教授 台灣大學資訊工程學系 資訊網路暨多媒體研究所 cwhsueh@csie.ntu.edu.tw.

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Optimal Real-Time Scheduling for Uniform Multiprocessors

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  1. Optimal Real-Time Scheduling for Uniform Multiprocessors 薛智文 助理教授 台灣大學資訊工程學系 資訊網路暨多媒體研究所 cwhsueh@csie.ntu.edu.tw Shih-Ying Chen and Chih-Wen Hsueh, "Optimal Dynamic-priority Real-Time Scheduling Algorithms for Uniform Multiprocessors," Proc. 29th IEEE Real-Time Systems Symposium, 147-156, Barcelona, Spain, Dec. 2008.

  2. Scheduling Task1 Processorm … Task2 … Processor2 Taskn Processor1 (periodically) Looking for simple condition to be feasible or schedulable. /46

  3. Kwang S. Hong and Joseph Y-T. Leung, ON-LINE SCHEDULING OF REAL-TIME TASKS, Real-Time Systems Symposium, 1988 /46

  4. Outline • Introduction • Multiprocessor Environments • Motivation • Contribution • Definitions and Assumptions • Model and T-Ler Planes • Scheduling Algorithms • Conclusion and Future Work • Q&A /46

  5. Multiprocessor Environments • Identical • All the processors are identical. • Uniform • Execution time is dependent on the running processor. • Scheduling algorithms for it might be adapted on asymmetric multi-core platform (AMP). • Unrelated • Execution time is independent on the running processor. /46

  6. Uniprocessor Scheduling P1 Tn T2 T1 … (periodically) RM and EDF are optimal. C. L. Liu and J. Layland. Scheduling algorithms for multiprogramming in a hard real-time environment. Journal of the ACM, 10(1):46–61, 1973. /46

  7. Identical Multiprocessor Scheduling P1 Tn T2 T1 … P2 (periodically) … Pm LLREF is optimal, with preemption and migration. R.R. Muntz and E.G. Coffman. Optimal preemptive scheduling on two-processor systems. IEEE Transactions on Computers, (11):1014–1020, Nov. 1969. (level algorithm) Hyeonjoong Cho, BinoyRavindran, and E. Douglas Jensen. An optimal real-time scheduling algorithm for multiprocessors. RTSS, pages 101–110, Oct. 2006. (LLREF) /46

  8. Uniform Multiprocessor Scheduling P1 Tn T2 T1 … P2 (periodically) … Well… Pm Jane W.S. Liu and Ai-Tsung Yang, Optimal scheduling of independent tasks on heterogeneous computing systems, ACM '74 Proceedings of the 1974 annual conference, 1974 /46

  9. Uniform Multiprocessor Scheduling (cont.) P1 Tn T2 T1 … P2 (periodically) … PG or PCG is optimal, with preemption and migration. Pm Edward C. Horvath, Shui Lam, and Ravi Sethi. A level algorithm for preemptive scheduling. Journal of the ACM, 24(1):32–43, January 1977. Shih-Ying Chen and Chih-Wen Hsueh, "Optimal Dynamic-priority Real-Time Scheduling Algorithms for Uniform Multiprocessors," Proc. 29th IEEE Real-Time Systems Symposium, 147-156, Barcelona, Spain, Dec. 2008. (PC, PCG) /46

  10. Why “Uniform”? task with execution requirement = 4 processor 1 with computing capacity = 2 time processor 2 with computing capacity = 1 /46

  11. T1 (8, 10) T2 (7, 10) One task can only run on one processor at a time. /46

  12. Task migration might be easier on multicore platform P1 … Shared memory P2 Pm /46

  13. Motivation A simpler way to describe the execution behavior of tasks and processors. No existing optimal scheduling algorithm in terms of feasibility condition. /46

  14. OS Scheduling on Hypervisor App App … Guest OS Guest OS Hypervisor … VCPU VCPU VCPU Scheduling … PCPU PCPU PCPU /46

  15. Contribution • A novel description plane: T-Ler plane • Two optimal dynamic-priority on-line scheduling algorithms. /46

  16. Definitions and Assumptions • Basic definitions • On-line scheduling • Dynamic-priority scheduling • Preemptive scheduling • Assumptions : • Uniform multiprocessors • Task is periodic • Deadline is equal to the end of period. • Full migration /46

  17. Definitions and Assumptions (cont.) • Tasks : • Task Tiwith utilizationuiwhere • Assume ui in decreasing order : • Processors : • Processor Pi with computing capacitysi • Assume si in decreasing order : /46

  18. Feasibility Conditions (Funk) S. Funk, J. Goossens, and S. Baruah. “On-line scheduling on uniform multiprocessors,” RTSS, Dec. 2001. /46

  19. Outline • Introduction • Model and T-Ler Plane • P-fair and T-L Plane • T-L Planes • T-Ler Planes • Scheduling Algorithms • Conclusion and Future Work • Q&A /46

  20. P-fair and T-L Plane 1 S. Baruah, N. Cohen, C. Plaxton, and D. Varvel, “Proportionate progress: A notion of fairness in resource allocation,” Algorithmica, June 1996. 2 H. Cho, B. Ravindran, and E. D. Jensen. “An optimal real-time scheduling algorithm for multiprocessors,” RTSS, Oct. 2006. • Proportionate Fairness ( P - fair 1) • Each task is scheduled resources in proportion to its utilization. • Time and Local Remaining Execution Time Plane ( T-L plane 2) • Show that scheduling for multiprocessors can be viewed as repeatedly occurring T-L planes. /46

  21. P-fair:Each task is scheduled resources in proportion to its utilization. Task= (4, 8), (execution_time, period) remaining execution time 4 fluid schedule time 0 4 8 /46

  22. P-fair and T-L Plane (cont.) remaining execution time T1 time period period period local remaining execution time: utilization * ( t2 – t1 ) T2 period period t1 t2 /46

  23. T-L Plane:Time and Local Remaining Execution Time Plane local remaining execution time T1 T2 time t1 t2 /46

  24. T-L Planes … remaining execution time T1 time period period period local remaining execution time: utilization * ( t2 – t1 ) T2 period period t1 t2 /46

  25. T-Ler Planes Time and Local Remaining Execution Requirement Plane ( T-Ler Plane) remaining execution requirement Task= (4, 8), (execution_requirement, period) 4 fluid schedule time 0 4 8 /46

  26. T-Ler Planes (cont.) remaining execution requirement T1 time period local remaining execution requirement: utilization * ( t2 – t1 ) T2 period t1 t2 /46

  27. Processor Boundary local remaining execution requirement time 0 /46

  28. Rescheduling Events local remaining execution requirement Event C (Ceiling hitting event) Event F (Floor hitting event) time 0 Event B (Bottom hitting event) /46

  29. Outline • Introduction • Model and T-Ler Planes • Scheduling Algorithms • Precaution Greedy Scheduling Algorithm • Precaution Cut Greedy Scheduling Algorithm • Proof of Optimality • Conclusion and Future Work • Q&A /46

  30. Framework local remaining execution requirement T-Ler plane remaining execution requirement remaining execution requirement time T1 0 4 8 time time 4 local T2 time 0 4 8 local local local /46

  31. Why P and G? local remaining execution requirement time 0 Greedy Precaution /46

  32. Precaution Greedy Scheduling Algorithm local remaining execution requirement The times of rescheduling is unpredictable. time 0 /46

  33. Precaution Cut Greedy Scheduling Algorithm local remaining execution requirement Give an upper bound of “n” rescheduling in a T-Ler plane. time 0 /46

  34. PG vs. PCG • When any event occurs, PG and PCG will reschedule. • PCG reduce the times of rescheduling dramatically. /46

  35. Task Order local remaining execution requirement ? time 0 /46

  36. Task Order (cont.) local remaining execution requirement time event occurs /46

  37. Outline • Introduction • Model and T-Ler Planes • Scheduling Algorithms • Precaution Greedy Scheduling Algorithm • Precaution Cut Greedy Scheduling Algorithm • Proof of Optimality • Conclusion and Future Work • Q&A /46

  38. IFF Feasibility Conditions (Funk) Feasibility Condition violated S. Funk, J. Goossens, and S. Baruah. “On-line scheduling on uniform multiprocessors,” RTSS, Dec. 2001. /46

  39. Proving PG is Feasible When any event occurs, PG will reschedule. Here we want to show any event occurs earlier than feasibility condition is violated. local remaining execution requirement feasibility condition is violated initial condition If u2 > s2 T1 or T2 will invoke event before feasibility condition is violated s1 ≥ u1 s1 + s2 ≥ u1 + u2 s1 + s2 + s3 ≥ u1 + u2 + u3 s1 ≥ u’1 s1 + s2 = u’1 + u’2 s1 + s2 + s3 ≥ u’1 + u’2 + u’3 ( T’1 , T’2 ) could be ( T1 ,T3 ) or ( T2 ,T3 ) time 0 feasibility condition is violated /46

  40. Proving PG is Feasible (cont.) local remaining execution requirement feasibility condition violate initial condition s1 ≥ u1 s1 + s2 ≥ u1 + u2 s1 + s2 + s3 ≥ u1 + u2 + u3 s1 ≥ u’1 s1 + s2 = u’1 + u’2 s1 + s2 + s3 ≥ u’1 + u’2 + u’3 If u2 < s2 T3 will invoke event before feasibility condition is violated ( T’1 , T’2 ) could be ( T1 ,T3 ) or ( T2 ,T3 ) time 0 feasibility condition violate /46

  41. Proving PG is Optimal In the beginning, set of tasks and processors is feasible. PG reschedules at any evens and is still feasible. /46

  42. Proving PCG is Feasible • When any event occurs, set of tasks and processors is feasible by PCG. • Remove the task and the processor that invoke event. • When event B occurs : • u’n = 0 • When event C occurs : • s1 = u’1 • When event F occurs : • si = u’j i = j • si = u’j i > j • si = u’j i < j /46

  43. Proving PCG is Feasible (cont.) We want to derive : /46

  44. Proving PCG is Optimal In the beginning, the set of tasks and processors is feasible. PCG reschedules at any event and is still feasible. /46

  45. Conclusion • We presented T-Ler plane which is easier for reasoning about the execution behavior of tasks and processors. • Two optimal on-line scheduling algorithms • Precaution Greedy scheduling algorithm • Precaution Cut Greedy scheduling algorithm • PCG reduces the times of rescheduling dramatically. • Our result might be applicable to current asymmetric multicore platform. /46

  46. Future Work Verifying the performance of PG and PCG. Implementing PG and PCG scheduling algorithms on asymmetric multicore platform. Reduce the migration times of PCG. Extend PCG to globally periodical. /46

  47. Q&A Thanks for your attention!! /46

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