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Chapter 3 โพรเซสเซอร์และการทำงาน The Processing Unit. เนื้อหา. นิยาม และคำศัพท์ที่ควรรู้เกี่ยวกับไมโครโพรเซสเซอร์และ ไมโครคอมพิวเตอร์ ประวัติความเป็นมาของไมโครโพรเซสเซอร์ ข้อดีข้อเสียของไมโครโพรเซสเซอร์ ข้อพิจารณาในการเลือกใช้ไมโครโพรเซสเซอร์. Computer BUS.
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Chapter 3 โพรเซสเซอร์และการทำงานThe Processing Unit
เนื้อหา นิยาม และคำศัพท์ที่ควรรู้เกี่ยวกับไมโครโพรเซสเซอร์และ ไมโครคอมพิวเตอร์ ประวัติความเป็นมาของไมโครโพรเซสเซอร์ ข้อดีข้อเสียของไมโครโพรเซสเซอร์ ข้อพิจารณาในการเลือกใช้ไมโครโพรเซสเซอร์
Computer BUS • A group of wires that connects several devices • Three types of Bus • Address bus • Data bus • Control bus
Address bus • Used to specify memory location that the cpu want to access(read/write) • n-bit address bus provides 2n addresses • For Example • MCS-51 16-bit address bus -> 216 = 16 Kbyte of memory • 8086 20-bit address bus -> 220 = 1 Mbyte of memory • Pentium 32-bit address bus -> 232 = 4 Gbyte of memory
Databus • Used to sent data between CPU and peripheral(memory, i/o) • The more bit of data bus, the more speed achieved • For Example • MCS-51 8-bit data bus • 8086 16-bit data bus • Pentium 64-bit data bus
CPU : Basic operations • Fetch : Read the instructions and data from memory • Execute : perform the desired operation and write the result into the memory or registers
Terminology • IR : Instruction Register • MAR : Memory Address Register
Instructions of CPU • There are 4 types of instructions 1. Data transfer between memory and CPU registers 2. Arithmetic and Logic Operations on data 3. Program Sequencing and Control 4. I/O transfer
Basic instruction types : three address instruction • LOAD R0,[10000] • LOAD R1,[10001] • ADD R2, R0, R1 • LOAD R0,[10002] • ADD R1, R0,R2 • STORE [10003],R1 D = A+B+C Note ADD R2,R0,R1 means R2 = R0+R1
Basic instruction types : two address instruction • LOAD R0,[10000] • LOAD R1,[10001] • ADD R0,R1 • LOAD R2,[10002] • ADD R0,R2 • STORE [10003],R0 D = A+B+C Note ADD R0,R1 means R0 = R0+R1
Basic instruction types : one address instruction • LOAD [10000] • ADD [10001] • ADD [10002] • STORE [10003] D = A+B+C Note ADD [10001] means Acc = Acc + [10001]
CPU registers • General purpose registers • R0,R1…Rn • A,B, C,…. • Special purpose register • PC • SP • Accumulator • Flag or Condition code
PC :Program Counter register • Used to keep the next address of memory that CPU want to access • PC and address-bus have the same size
Branching [25000] = [10000]+[10002]+[10003]+….+[24999] LOC35000: LOAD R0,#0 LOAD R1,#14999 LOAD R3,#10000 LOC35003: LOAD R2,[R3] ADD R0, R2 INC R3 DEC R1 Branch_NZ LOC35003 STORE [R3],R0
Flag or Condition code Register • keep the status after perform arithmetic and logic operation Example: Flags of CPU z80
Addressing modes of CPU • Immediate #value load R0,#00001 • Register Ri load R0,R1 • Direct(absolute) [mem_loc] load R0,[100000] • Register indirect [Ri] load R0,[R1] • Relative X[PC] • Index
Immediate addressing • load R1,#00001
Direct addressing • LOAD R1,[1200H]
Register indirect • load R0,[R1]
Index addressing • Use index register • Effective address = X + [Ri] • When X = offset (or displacement) • Ri = index register or Base register
Index addressing Offset is given as a constant
Index addressing Offset is in the index register
Example1 : Transfering bytes of data • Copy values in memory location 1000h-1400h to location 2000h-2400h (1024 byte)
Example1 : Transfering bytes of data STRT: LD R0,#1000H LD R1,#2000H LD R3,#1024 LOC_A: LD R4, [R0] STORE [R1], R4 INC R0 INC R1 DEC R3 BRANCH>0 LOC_A CALL PRINTF
Example2: Unsigned Multiplicationby Repeated Addition • Multiply 8-bit unsigned number • C = A * B
Example2: Unsigned Multiplicationby Repeated Addition STRT : LOAD R1,#0 LOAD R3, [mem_loc_A] LOAD R2, [mem_loc_B] LOOP: ADD R1,R3 DEC R2 BRANCH>0 LOOP STORE [mem_loc_C],R1 CALL PRINTF
Example2: Unsigned Multiplicationby Repeated Addition • Problem of the program in page 37 • If B = 0 then the result is A , not 0 • How to remedy the problem
Example2: Unsigned Multiplicationby Repeated Addition STRT : LOAD R1,#0 LOAD R3, [mem_loc_A] LOAD R2, [mem_loc_B] Compare R2,#0 Branch_Z STR LOOP: ADD R1,R3 DEC R2 Branch>0 LOOP STR: STORE [mem_loc_C],R1
Example3: if-then-else if (mem_loc_a == 5) mem_loc_b++; else mem_loc_b = mem_loc_a + mem_loc_b;
Example3: if-then-else Load R1,[mem_loc_a] Load R2,[mem_loc_b] Compare r1,#5 Branch_NZ b_p_a inc r2 branch stre b_p_a: Add r2,r1 stre: Store [mem_loc_a],r1 Store [mem_loc_b],r2
Example4: checking greater-than if (mem_loc_a > 5) mem_loc_b++; else mem_loc_b = mem_loc_a + mem_loc_b;
Example4: checking greater-than Load R1,[mem_loc_a] Load R2,[mem_loc_b] compare r1,#5 branch_z equ_g_5;equal 5 branch_M equ_g_5;M= minus inc r2 branch stre equ_g_5: Add r2,r1 stre: Store [mem_loc_a],r1 Store [mem_loc_b],r2
Example4: checking greater-than Load R1,[mem_loc_a] Load R2,[mem_loc_b] sub r1,#5 branch>0 gt_5 Add r2,r1 branch stre gt_5: inc r2 stre: Store [mem_loc_a],r1 Store [mem_loc_b],r2
Basic processing unit • the structure of simple CPU • How the internal parts of CPU work • How to design the simple processor • Datapath • Control Unit
Perform instruction ADD R1,R2 Fetch phase Execution phase • MAR <= PC • ADDRESS_BUS <= MAR, read • MDR <= MEMORY[MAR] • IR <= MDR • Z <= PC + 4 • PC <= Z • Y <= R1 • Z <= Y + R2 • R2 <= Z
Perform instruction ADD R1,R2 Active Signals • MAR <= PC PCout, MARin • ADDRESS_BUS <= MAR,read read • MDR <= MEMORY[MAR] MDRinE, WMFC • IR <= MDR MDRout,IRin • Z <= PC + 4 PCout, MUX_sel4, Add,Zin • PC <= Z Zout,PCin • Y <= R1 Yin, R1out • Z <= Y + R2 R2out, MUX_selY, Add, Zin • R2 <= Z Zout, R2in
How to modify FETCH operation to be faster MAR <= PC ADDRESS_BUS <= MAR, Read MDR <= MEMORY[MAR], WMFC IR <= MDR Z <= PC + 4 PC <= Z MAR <= PC, Read, Z <= PC+4 , MDR <= MEMORY[MAR] PC <= Z, WMFC IR <= MDR
Modified FETCH operation Active Signals MAR <= PC, Read, Z <= PC+4 , MDR <= MEMORY[MAR] PC <= Z, WMFC IR <= MDR PCout, MARin, Read, Mux_sel4, Add, Zin Zout, PCin, Yin, WMFC MDRout, IRin
