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Paralleelarvutid Parallel Computer Architectures

Paralleelarvutid Parallel Computer Architectures. Pp. Pp. Ps. Ps. Pp. Pp. Lõpp. Pp. Pp. T. f. 1-f. n CPU-d aktiivsed. Paralleliseeritav osa. Järjestik osa. Üks CPU aktiivne. f. 1-f. Kiirus. fT. (1-f)T/n. CPU-de arv. P1. P1. P1. P1. Sünkroniseerimine. P2. P2. P2.

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Paralleelarvutid Parallel Computer Architectures

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  1. ParalleelarvutidParallel Computer Architectures Pp Pp Ps Ps Pp Pp Lõpp Pp Pp T . . . f 1-f n CPU-d aktiivsed Paralleliseeritav osa Järjestik osa Üks CPU aktiivne f 1-f Kiirus fT (1-f)T/n CPU-de arv T. Evartson

  2. P1 P1 P1 P1 Sünkroniseerimine P2 P2 P2 P2 P3 Sünkroniseerimine P3 P3 P3 P1 Tööde puhver P2 P3 P1 P2 P3 P4 P5 P6 T. Evartson

  3. Klassifikatsioon (Flynn´s taxonomy) Arvutid SISD SIMD MIMD MISD Vektor protsessor Vector Processor Konveier protsessorid Pipeline Processors Konveier Pipeline Maatriks protsessor Array Processor Mitme ALU-ga Superscalar Architecture Multi- protsessor Multiprocessors Multiarvuti Multicomputers UMA Uniform Memory Acess COMA Cashe Only Memory Acess NUMA NonUniform Memory Acess MPP Massively Parallel Processors NOW Network of Worksations Bus Switched CC-NUMA NC-NUMA Võrk Grid Hüperkuup Hypercube Shared memory Message passing T. Evartson

  4. Klassifikatsioon (Flynn´s taxonomy) Arvutid SISD SIMD MIMD MISD Vektor protsessor Vector Processor Konveier protsessorid Pipeline Processors Konveier Pipeline Maatriks protsessor Array Processor Mitme ALU-ga Superscalar Architecture Multi- protsessor Multiprocessors Multiarvuti Multicomputers UMA Uniform Memory Acess COMA Cashe Only Memory Acess NUMA NonUniform Memory Acess MPP Massively Parallel Processors NOW Network of Worksations Bus Switched CC-NUMA NC-NUMA Võrk Grid Hüperkuup Hypercube Shared memory Message passing T. Evartson

  5. SISD - Single Instruction Single Data-stream Käsu taseme paralleelsusInstruction-Level Parallelism Konveier. Pipeline S1 Käsu laadimine S2 Käsu deko- deerimine S3 Operandide laadimine S4 Käsu täitmine S5 Resultadi salvesta- mine S1 1 2 3 4 5 S2 1 2 3 4 5 S3 1 2 3 4 S4 1 2 3 S5 1 2 Aeg T. Evartson

  6. Superscalar Architestures S1 Käsu laadimine S2 Käsu deko- deerimine S3 Operandide laadimine S4 Käsu täitmine S5 Resultadi salvesta- mine S2 Käsu deko- deerimine S3 Operandide laadimine S4 Käsu täitmine S5 Resultadi salvesta- mine S4 ALU S4 ALU S1 Käsu laadimine S2 Käsu deko- deerimine S3 Operandide laadimine S4 Ujupunkt tehted S5 Resultadi salvesta- mine S4 ALU S4 ALU T. Evartson

  7. Klassifikatsioon (Flynn´s taxonomy) Arvutid SISD SIMD MIMD MISD Vektor protsessor Vector Processor Konveier protsessorid Pipeline Processors Konveier Pipeline Maatriks protsessor Array Processor Mitme ALU-ga Superscalar Architecture Multi- protsessor Multiprocessors Multiarvuti Multicomputers UMA Uniform Memory Acess COMA Cashe Only Memory Acess NUMA NonUniform Memory Acess MPP Massively Parallel Processors NOW Network of Worksations Bus Switched CC-NUMA NC-NUMA Võrk Grid Hüperkuup Hypercube Shared memory Message passing T. Evartson

  8. SIMD - Single Instruction Multiple Data-stream Protsessori tasandi parlleelsusProcessor-Level Parallelism Maatriksprotsessor Array Processor Juhtautomaat Control Unit Mälu Mälu Mälu Mälu Protsessor Protsessor Protsessor Protsessor Mälu Mälu Mälu Mälu Protsessor Protsessor Protsessor Protsessor Mälu Mälu Mälu Mälu Protsessor Protsessor Protsessor Protsessor Mälu Mälu Mälu Mälu Protsessor Protsessor Protsessor Protsessor Vektorprotsessor Vector Processor Sisendvektorid ALU Vektor ALU ALU ALU T. Evartson

  9. Klassifikatsioon (Flynn´s taxonomy) Arvutid SISD SIMD MIMD MISD Vektor protsessor Vector Processor Konveier protsessorid Pipeline Processors Konveier Pipeline Maatriks protsessor Array Processor Mitme ALU-ga Superscalar Architecture Multi- protsessor Multiprocessors Multiarvuti Multicomputers UMA Uniform Memory Acess COMA Cashe Only Memory Acess NUMA NonUniform Memory Acess MPP Massively Parallel Processors NOW Network of Worksations Bus Switched CC-NUMA NC-NUMA Võrk Grid Hüperkuup Hypercube Shared memory Message passing T. Evartson

  10. MISD – Multi Instruction Single Data Mälu CU 1 CU 2 CU n ... Data Instructions Data Protsessor 1 Protsessor 1 Protsessor 1 ... T. Evartson

  11. Klassifikatsioon (Flynn´s taxonomy) Arvutid SISD SIMD MIMD MISD Vektor protsessor Vector Processor Konveier protsessorid Pipeline Processors Konveier Pipeline Maatriks protsessor Array Processor Mitme ALU-ga Superscalar Architecture Multi- protsessor Multiprocessors Multiarvuti Multicomputers UMA Uniform Memory Acess COMA Cashe Only Memory Acess NUMA NonUniform Memory Acess MPP Massively Parallel Processors NOW Network of Worksations Bus Switched CC-NUMA NC-NUMA Võrk Grid Hüperkuup Hypercube Shared memory Message passing T. Evartson

  12. MIMD- Multiple Instruction Multiple Data-stream Multiprotsessor- Multiarvuti Multiprotsessor Multiprocessor CPU CPU Mälu CPU CPU CPU CPU CPU CPU Multiarvuti Multicomputer Mälu Mälu CPU CPU Message- passing interconnection network Mälu CPU CPU Mälu Mälu CPU CPU Mälu CPU CPU Mälu Mälu T. Evartson

  13. T. Evartson

  14. Degree (fanout) - antud sõlme tulevate ühenduste arv Diameter - kaugus kahe teineteisest kõige kaugemal asuva sõlme vahel Bisection bandwith - sõlmede pooleks jagamisel kahe kõge halvemini ühendatud poole vaheline läbilaskevõime (bandwith) Dimensionality - kahte sõlme ühendavate teede valikute arv Loosley coupled - riistvara koosneb suurtest sõltumatutest CPU-dest (coarse-grained). Tightly coupled - tavaliselt väiksemad tihedalt seotud CPU-d (fine-grained). CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU CPU T. Evartson

  15. Static interconnection networks Bus topology Ring topology Star topology Binary tree P000 P00 P001 P0 P010 P01 P011 Hypercube topology N=3 N=1 N=2 T. Evartson

  16. Dynamic interconnection networks Crossbar network Pr1 Pr2 Pr3 Pr4 s11 s12 s13 s14 Pv1 s21 s22 s23 s24 Pv2 s31 s32 s33 s34 Pv3 s41 s42 s43 s44 Pv4 T. Evartson

  17. T. Evartson

  18. Switching CPU1 CPU2 Routing deadlock CPU1 CPU3 CPU4 CPU2 T. Evartson

  19. Multistage networks P1 P2 P3 P4 s11 s12 s13 s14 M1 s21 s22 s23 s24 M2 s31 s32 s33 s34 M3 s41 s42 s43 s44 M4 Multistage Switching Network X X A A B Y B Y Omega switching network Mälud CPU-d 000 1A 2A 3A 000 001 001 010 010 1B 2B 3B 011 011 100 100 1C 2C 3C 101 101 110 110 1D 2D 3D 111 111 T. Evartson

  20. Multiprotsessorid Multiprocessors Ühe siiniga multiprotsessor CPU CPU CPU CPU CPU Mälu Lokaalsete mäludega multiprotsessor Lokaalne mälu Lokaalne mälu Lokaalne mälu Lokaalne mälu Lokaalne mälu CPU CPU CPU CPU CPU Mälu T. Evartson

  21. T. Evartson

  22. Klassifikatsioon (Flynn´s taxonomy) Arvutid SISD SIMD MIMD MISD Vektor protsessor Vector Processor Konveier protsessorid Pipeline Processors Konveier Pipeline Maatriks protsessor Array Processor Mitme ALU-ga Superscalar Architecture Multi- protsessor Multiprocessors Multiarvuti Multicomputers UMA Uniform Memory Acess COMA Cashe Only Memory Acess NUMA NonUniform Memory Acess MPP Massively Parallel Processors NOW Network of Worksations Bus Switched CC-NUMA NC-NUMA Võrk Grid Hüperkuup Hypercube Shared memory Message passing T. Evartson

  23. UMA SMP -Uniform Memory Access Symmetric Multiprocessor Ilma Cacheta CPU1 CPU2 Mälu BUS Cache-ga CPU1 CPU2 Mälu cache cache BUS Cache ja privaat mäluga Privaat mälu Privaat mälu CPU1 CPU2 Mälu cache cache BUS T. Evartson

  24. Cache coherence Cache coherence - eri protsessorite juurde kuuluvate cache-te info sidumine. Cache coherence protocol - reeglid eri protsessorite cache-te koostöö juhtimiseks Write through protocol Lugemine: cache-s olemas - kasutab inot puudub cache-s - laeb mälust cache-sse Kirjutamine: cach-e olemas - kirjutab cache-sse ja mällu puudub cache-s - kirjutab otse mällu Invalid Shared Exclusive Modified Cache entry states MESI cache coherency protocol CPU1 CPU2 CPU3 Mälu CPU1 loeb blokki a a Exclusive BUS CPU 2 loeb blokist a CPU1 CPU2 CPU3 Mälu a a Shared Shared BUS CPU1 CPU2 CPU3 Mälu CPU 2 kirjutab blokki a a Modified BUS T. Evartson

  25. Probleemid: 1. Mälu. 2. Paraleliseeritavus. 3. Energia tarve. T. Evartson

  26. Klassifikatsioon (Flynn´s taxonomy) Arvutid SISD SIMD MIMD MISD Vektor protsessor Vector Processor Konveier protsessorid Pipeline Processors Konveier Pipeline Maatriks protsessor Array Processor Mitme ALU-ga Superscalar Architecture Multi- protsessor Multiprocessors Multiarvuti Multicomputers UMA Uniform Memory Acess COMA Cashe Only Memory Acess NUMA NonUniform Memory Acess MPP Massively Parallel Processors NOW Network of Worksations Bus Switched CC-NUMA NC-NUMA Võrk Grid Hüperkuup Hypercube Shared memory Message passing T. Evartson

  27. NC-NUMA - No Caching NonUniform Memory Access Multiprocessors CPU Mälu CPU Mälu Lokaalne siin Lokaalne siin MMU MMU Süsteemi siin NC-NUMA Mälu 1 Mälu 2 Mälu 3 Mälu 4 CPU1 CPU2 CPU3 CPU4 BUS T. Evartson

  28. Klassifikatsioon (Flynn´s taxonomy) Arvutid SISD SIMD MIMD MISD Vektor protsessor Vector Processor Konveier protsessorid Pipeline Processors Konveier Pipeline Maatriks protsessor Array Processor Mitme ALU-ga Superscalar Architecture Multi- protsessor Multiprocessors Multiarvuti Multicomputers UMA Uniform Memory Acess COMA Cashe Only Memory Acess NUMA NonUniform Memory Acess MPP Massively Parallel Processors NOW Network of Worksations Bus Switched CC-NUMA NC-NUMA Võrk Grid Hüperkuup Hypercube Shared memory Message passing T. Evartson

  29. CC-NUMA - Cache Coherent NonUniform Memory Access Multiprocesors CC-NUMA Mälu 1 Mälu 2 Mälu 3 Mälu 4 CPU1 CPU2 CPU3 CPU4 cache cache cache cache BUS CPU CPU Mälu Mälu Cache Cache Lokaalne siin Lokaalne siin Directory Directory MMU MMU Interconnection Network T. Evartson

  30. Message-Passing Multicomputers MPPs - Massively Parallel Processors CPU CPU Mälu CPU CPU Mälu . . . . . . Disk I/O Disk I/O Communucation Processor Communucation Processor High-prformance interconnection network NOW - Network of Workstations COW - Cluster of Workstations Computer Computer Computer Packet Packet T. Evartson

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