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Module 5. Paolo PRINETTO Politecnico di Torino (Italy) University of Illinois at Chicago, IL (USA) Paolo.Prinetto@polito.it Prinetto@uic.edu www.testgroup.polito.it. Module 5 : Component Libraries. Goal.
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Module 5 Paolo PRINETTO Politecnico di Torino (Italy)University of Illinois at Chicago, IL (USA) Paolo.Prinetto@polito.it Prinetto@uic.edu www.testgroup.polito.it Module 5 :Component Libraries
Goal • This module presents a collection of components libraries, including both logic level and RT levelelementary blocks • It also provides the possibility of downloading a set of VHDL libraries, developed and tested at Politecnico di Torino.
Structure • This module includes the following 3 lectures: • 5.1 RT level combinational blocks • 5.2 Logic level elementary sequential blocks • 5.3 RT level sequential blocks.
Libraries • The module provides the possibility of downloading (as .zip files) the following libraries of VHDL components: • L 05-01 - Logic level elementary blocks • L 05-02 - RT level combinational blocks • L 05-03 - RT level sequential blocks • L 05-04 - Test benches.