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CEG3420 Computer Design  Lecture 1

CEG3420 Computer Design  Lecture 1. Philip Leong. Overview. Course Style, Philosophy and Structure Intro to Computer Architecture. Course Administration. Instructor: Philip Leong (phwl) TA: Hiu Yung Wong (hywong2) Norris Leong (mpleong) Tuts: W5 (MMW703)

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CEG3420 Computer Design  Lecture 1

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  1. CEG3420 Computer Design Lecture 1 Philip Leong

  2. Overview • Course Style, Philosophy and Structure • Intro to Computer Architecture

  3. Course Administration • Instructor: Philip Leong (phwl) • TA: • Hiu Yung Wong (hywong2) • Norris Leong (mpleong) • Tuts: W5 (MMW703) • WWW: http://www.cse.cuhk.edu.hk/~phwl/ceg3420/ceg3420.html • Text: Computer Organization and Design: The Hardware/Software Interface, Second Edition, Patterson and Hennessy • Q: Need 2nd Edition? yes! >> 50% text changed, all exercises changed all examples modernized, new sections, ...

  4. Lecture notes • Available on CEG3420 Page • Courtesy of University of California at Berkeley’s CS152 Course (http://oheo.eecs.berkeley.edu:80/cs152/)

  5. Objectives • This is a course in Computer Design and at the end of the course, students should understand • how modern computer systems work • how to design a computer & how design decisions affect cost and performance. • how to measure performance

  6. Tutorials • These will be posted on the CEG3420 WWW site each week. • Tutorial solutions must be handed to the tutor in the tutorial session of the week following the tutorial unless otherwise specified

  7. Grading • Grade breakdown • Final exam: 50% (combined) • Midterm : 25% • Assignments : 20% • Tutorials: 5% • Anything late: -20% per day

  8. Cheating • What is cheating? • Studying together in groups is encouraged • Work must be your own • Common examples of cheating: running out of time on a assignment and then pick up output, take homework from box and copy, person asks to borrow solution “just to take a look”, copying an exam question, … • Any cases, (however small or large) will be forwarded to CS&E disciplinary committee

  9. Project • Two projects will be completed in this course • Software simulator for a subset of the MIPS instruction set • after completing this project you should really understand how the instruction set works logically • Design of a RISC microprocessor • after completing this project you should understand how to implement it in hardware • you can be creative and develop as simple/complex processor as you like • Done in groups of two

  10. Things We Hope You Will Learn from CEG3420 • Keep it simple and make it work • Fully test everything individually and then together • Retest everything whenever you make any changes • Last minute changes are big “no-nos” • Planning is very important: • Promise what you can deliver; deliver more than you promise • Murphy’s Law: things DO break at the last minute • Don’t make your plan based on the best case scenarios • Freeze you design and don’t make last minute changes • Never give up! It is not over until you give up.

  11. Assumed knowledge • Basic machine structure • processor, memory, I/O • Read and write basic C programs • Read and write in an assembly language • not necessarily MIPs which will be covered in the course • Logic design • logical equations, schematic diagrams, FSMs, components

  12. Levels of Representation (Review) temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) High Level Language Program Compiler Assembly Language Program Assembler 0000 1001 1100 0110 1010 1111 0101 1000 1010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111 Machine Language Program Machine Interpretation Control Signal Specification ALUOP[0:3] <= InstReg[9:11] & MASK ° °

  13. What is “Computer Architecture” Computer Architecture = Instruction Set Architecture + Machine Organization

  14. SOFTWARE Instruction Set Architecture (subset of Computer Arch.) ... the attributes of a [computing] system as seen by the programmer, i.e. the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls the logic design, and the physical implementation. – Amdahl, Blaaw, and Brooks, 1964 -- Organization of Programmable Storage -- Data Types & Data Structures: Encodings & Representations -- Instruction Set -- Instruction Formats -- Modes of Addressing and Accessing Data Items and Instructions -- Exceptional Conditions

  15. The Instruction Set: a Critical Interface software instruction set hardware

  16. Example ISAs (Instruction Set Architectures) • Digital Alpha (v1, v3) 1992-97 • HP PA-RISC (v1.1, v2.0) 1986-96 • Sun Sparc (v8, v9) 1987-95 • SGI MIPS (MIPS I, II, III, IV, V) 1986-96 • Intel (8086,80286,80386, 1978-96 80486,Pentium, MMX, ...)

  17. MIPS R3000 Instruction Set Architecture (Summary) Registers • Instruction Categories • Load/Store • Computational • Jump and Branch • Floating Point • coprocessor • Memory Management • Special R0 - R31 PC HI LO 3 Instruction Formats: all 32 bits wide OP rs rd sa funct rt OP rs rt immediate OP jump target

  18. ISA Level FUs & Interconnect Organization Logic Designer's View • Capabilities & Performance Characteristics of Principal Functional Units • (e.g., Registers, ALU, Shifters, Logic Units, ...) • Ways in which these components are interconnected • Information flows between components • Logic and means by which such information flow is controlled. • Choreography of FUs to realize the ISA • Register Transfer Level (RTL) Description

  19. Example Organization • TI SuperSPARCtm TMS390Z50 in Sun SPARCstation20 MBus Module SuperSPARC Floating-point Unit L2 $ CC DRAM Controller Integer Unit MBus MBus control M-S Adapter L64852 Inst Cache Ref MMU Data Cache STDIO SBus serial kbd SCSI Store Buffer SBus DMA mouse Ethernet audio RTC Bus Interface SBus Cards Boot PROM Floppy

  20. What is “Computer Architecture”? Application • Coordination of many levels of abstraction • Under a rapidly changing set of forces • Design, Measurement, and Evaluation Operating System Compiler Firmware Instruction Set Architecture Instr. Set Proc. I/O system Datapath & Control Digital Design Circuit Design Layout

  21. Forces on Computer Architecture Technology Programming Languages Applications Constraints e.g. cost, energy Computer Architecture Operating Systems History (A = F / M)

  22. Technology => dramatic change • Processor • logic capacity: about 30% per year • clock rate: about 20% per year • Memory • DRAM capacity: about 60% per year (4x every 3 years) • Memory speed: about 10% per year • Cost per bit: improves about 25% per year • Disk • capacity: about 60% per year

  23. VLSI commercial IC technology extrapolations

  24. DRAM chip capacity Microprocessor Logic Density DRAM Year Size 1980 64 Kb 1983 256 Kb 1986 1 Mb 1989 4 Mb 1992 16 Mb 1996 64 Mb 1999 256 Mb 2002 1 Gb Technology • In ~1985 the single-chip processor (32-bit) and the single-board computer emerged • => workstations, personal computers, multiprocessors have been riding this wave since • In the 2002+ timeframe, these may well look like mainframes compared single-chip computer (maybe 2 chips)

  25. Performance Trends Supercomputers Mainframes Minicomputers Log of Performance Microprocessors Y ear 1970 1975 1980 1985 1990 1995

  26. Processor Performance (SPEC) • performance now improves ­ 50% per year (2x every 1.5 years) RISC introduction Did RISC win the technology battle and lose the market war?

  27. Design Analysis Measurement and Evaluation Architecture is an iterative process -- searching the space of possible designs -- at all levels of computer systems -- constraints of energy, cost (=area) and performance Creativity Cost / Performance Analysis Good Ideas Mediocre Ideas Bad Ideas

  28. CEG3420: Course Content Computer Architecture and Engineering Instruction Set Design Computer Organization Interfaces Hardware Components Compiler/System View Logic Designer’s View ­“Building Architect” ­“Construction Engineer”

  29. CEG3420: So what's in it for me? • In-depth understanding of the inner-workings of modern computers, their evolution, and trade-offs present at the hardware/software boundary. • Insight into fast/slow operations that are easy/hard to implementation hardware • Experience with the design processin the context of a large complex (hardware) design. • Functional Spec --> Control & Datapath --> Physical implementation • Modern CAD tools • Designer's "Conceptual" toolbox.

  30. Conceptual tool box? • Evaluation Techniques • Levels of translation (e.g., Compilation) • Levels of Interpretation (e.g., Microprogramming) • Hierarchy (e.g, registers, cache, mem,disk,tape) • Pipelining and Parallelism • Static / Dynamic Scheduling • Indirection and Address Translation • Synchronous and Asynchronous Control Transfer • Timing, Clocking, and Latching • CAD Programs, Hardware Description Languages, Simulation • Physical Building Blocks (e.g., CLA) • Understanding Technology Trends

  31. Summary • All computers consist of five components • Processor: (1) datapath and (2) control • (3) Memory • (4) Input devices and (5) Output devices • Not all “memory” are created equally • Cache: fast (expensive) memory are placed closer to the processor • Main memory: less expensive memory--we can have more • Interfaces are where the problems are - between functional units and between the computer and the outside world • Need to design against constraints of performance, power, area and cost

  32. Summary: Computer System Components Proc • All have interfaces & organizations Caches Busses adapters Memory Controllers Disks Displays Keyboards I/O Devices: Networks

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