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Embedded Design Flow

Embedded Design Flow. Xilinx University Program. Schedule. Start @ 9:00am with Introductions Morning break from 10:15am-10:30am Lunch from noon - 1pm Fill in gift forms from 1pm - 1:15pm (Day 1) Afternoon break from 3pm-3:15pm End @ 5pm. Prerequisites. Understand the Xilinx ISE tool set

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Embedded Design Flow

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  1. Embedded Design Flow Xilinx University Program This material exempt per Department of Commerce license exception TSU

  2. Schedule • Start @ 9:00am with Introductions • Morning break from 10:15am-10:30am • Lunch from noon - 1pm • Fill in gift forms from 1pm - 1:15pm (Day 1) • Afternoon break from 3pm-3:15pm • End @ 5pm

  3. Prerequisites • Understand the Xilinx ISE tool set • Basic C programming • Basic understanding of a processor based-system • Basic HDL knowledge

  4. Course Objectives After completing this workshop, you will be able to: • Describe the various tools that encompass Xilinx Embedded Development Kit (EDK) • Rapidly architect an embedded system containing an IBM PowerPC processor and Xilinx-supplied CoreConnect bus architecture IP • Create and Integrate your own custom peripheral • Utilize the Eclipse-based Software Development Kit (SDK) to develop and debug software applications • Understand hardware and software debugging requirements and process • Cross debug a system using SDK and Chipscope-Pro

  5. Course Outline The course consists of the following modules: • EDK Overview • Lab 1: Basic Hardware System • Hardware Design • Adding a Processor System to an FPGA Design • Lab 2: Adding IP to a Hardware Design • Adding Your Own IP to the OPB Bus • Lab 3: Adding Custom IP

  6. Course Outline The course consists of the following modules: • Software Development • Address Management • Lab 4: Writing Basic Software Applications • Debugging • Lab 5: Software Writing and Debugging in SDK • System Simulation • Lab 6: Performing System Verification

  7. DIP SW Push Buttons PowerPC-Based Labs 1 through 6 OPB Bus PLB Bus UART GPIO PLB2OPB PPC MY IP LEDs PLB BRAM Cntlr PLB BRAM Timer Lab1 PLB BRAM Cntlr PLB BRAM INTC Lab2 Lab3 ICON Lab5 IBA Lab6

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