PORTCARDs & DOIMs

1. PORTCARDs & DOIMs Sasha Pronko Fermilab Sasha Pronko, Silicon Workshop II, UCSB

2. PortCard & DOIM: what & where? Sasha Pronko, Silicon Workshop II, UCSB

3. PortCart requirements • Low mass & size • High radiation dose • Reliability • High heat transfer capability • Remote control and data transmission • Low noise regulated voltage • Detector grounding strategy Sasha Pronko, Silicon Workshop II, UCSB

4. PortCard functions • Powers, initializes, controls and read out chips • Connects to SVX3 chips by High Density Interconnects (HDI) • Power for analog section of chips • Calibration voltages for z &  sides • Interface with FIB • Forwards L1A accept to chips • Buffers FECLK & BECLK • Forwards data to FIB Sasha Pronko, Silicon Workshop II, UCSB

5. Data & OBVD to FIB HDI’s to ladders Power/commands from JC/FIB PortCard basics • PC—beryllia based multi-chip module • One PC per wedge: • SVX: 72 PC’s; ISL: 30 PC’s; L00: 12 PC’s Sasha Pronko, Silicon Workshop II, UCSB

6. PortCard components • Per PC • 1 Transceiver • Per Ladder • 1 analog DDR; • 1 digital DDR; • 2 ELCO’s; • 2 JFET’s; • NPN • DOIM DDR — Digital to Analog Converter/Decoder/ Regulator chip Sasha Pronko, Silicon Workshop II, UCSB

7. PortCard: Digital section • 11 Commands & CLKs • 53 MHz clock • Beam X-ing clock • L1A signal • etc. (SVX3D by Ankush) • DVDD power supplies • Data transmission • DOIM • Components • Transceiver • Receives FIB commands & CLKs, transforms them into single-ended signals • digital DDR • Decoder • Buffers CLKs Sasha Pronko, Silicon Workshop II, UCSB

8. PortCard: Analog section • Voltages • AVDD to FE • Bias to sensors • Components • Analog DDR • FE voltage regulation • DAC-calibration voltage • JFET & NPN transistors Sasha Pronko, Silicon Workshop II, UCSB

9. PortCard location L00 & ISL PC’s are in the same place Sasha Pronko, Silicon Workshop II, UCSB

10. PortCard location, continued • PC need to be cooled Sasha Pronko, Silicon Workshop II, UCSB

11. PortCard: Performance stability & Radiation hardness • Performance • Noise SSDDAQ  Noise SSDPCDAQ • Radiation hardness • Rick Tesarek says (Run2 measurement) that ionizing doze for SVX PC is 20 krad/fb-1 (~10% error) • ~80-160 krad in Run2 (4-8 fb-1) • PC designed hardness is ~200 krad • L00 bias issues • Degradation of dielectric  possible problems with HV bias (specification is ~200V, L00 may need to be biased up to much higher voltages) Sasha Pronko, Silicon Workshop II, UCSB

12. PortCard: Radiation Hardness Tests • Radiation hardness tests with 63 MeV protons (UC Davis) and 8 GeV protons (Fermilab) • 2 PC’s irradiated: 200 krad & 400 krad • 400 krad PC was used for long term reliability testing with resistive loads • No failure after 3 months • No change in TX & DDR current draws • No change in DDR DAC calibration voltage slope change • No shift in pedestals; no change in noise • JFET & NPN irradiated by ~500 krad • No problems with analog voltage regulation observed • PC’s should withstand the radiation dose expected for Run 2 Sasha Pronko, Silicon Workshop II, UCSB

13. DOIM basics • DOIM — Dense Optical Interface Module • Converts electrical signal from SVX chip into optical signal (interface between chip & FIB) • 53 Mbyte/sec/DOIM data transfer rate; • 8 bits & OBVD; bit error rate <10-12 at 63 MHz • 3 major components: transmitter (TX), 22m fiber, receiver (RX) • 1 DOIM per ladder • Radiation tolerance up to 200 krad Sasha Pronko, Silicon Workshop II, UCSB

14. DOIM: component location • TX on PC (5 TXs per PC in SVX) • 10 RX (2 wedges) on Fiber Transition Module (FTM) Sasha Pronko, Silicon Workshop II, UCSB

15. DOIM: TX • TX — InGaAsP edge emitting laser diode array • 12 channel (9 used); 250m pitch matches fiber • Power supply: VCC-VLD • VCC=5V & VLD adjustable • current: 20 mA/ch at 3V; slope ~2mA/0.1V • Differential amplifier is sensitive up to 10mV • Light output: 1 mW/ch @20mA • Light cone: uniformity in far field angle affects light coupling (~400 W span) Sasha Pronko, Silicon Workshop II, UCSB

16. DOIM: RX • RX — InGaAs/InP PIN-diode array • 12 channels (9 used) • Power supply: VCC=5V • Optical input converted to current pulse to receiver chip Sasha Pronko, Silicon Workshop II, UCSB

17. Digital 1 = Digital 0 = Digital 1 = Digital 0 = We have bit stuck low or bit stuck high errors if these characteristics are out of range DOIM: TX & RX characteristics Sasha Pronko, Silicon Workshop II, UCSB

18. DOIM: OBVD & 8 bits • OBVD & 8 bits — SVX chip (Ankush’s talk) • Example of TX output Sasha Pronko, Silicon Workshop II, UCSB

19. DOIM: Temperature sensitivity • TX is sensitive to temperature (not an issue for RX) • RX designed to operate at 40-60% duty cycle Sasha Pronko, Silicon Workshop II, UCSB

20. DOIM: Radiation Hardness of RX • Beam tests with protons: 200krad & 400krad • Linear dependence to dose • Ratio of light drop independent on light power • Degradation is <10% per 200 krad Sasha Pronko, Silicon Workshop II, UCSB

21. Summary • PC’s & DOIM’s provide an interface between sensors/chips and PS, DAQ • PC’s performance is stable respect to radiation dose expected for Run2 • DOIM • TX sensitive to temperature • 10% degradation per 200 krad — it should be enough for Run2 • RX sensitive to duty cycle • Sources of info: • cdf5535, cdf3865, cdf6497, cdf7281, ESE-SVX980318, old talks, TDR Sasha Pronko, Silicon Workshop II, UCSB