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Floating-Point Operations. Chapter 18 S. Dandamudi. Introduction FPU organization Data registers Control and status registers Tag register Floating-point instructions Data movement Addition/Subtraction Multiplication/Division Comparison Miscellaneous Illustrative examples. Outline.
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Floating-Point Operations Chapter 18 S. Dandamudi
Introduction FPU organization Data registers Control and status registers Tag register Floating-point instructions Data movement Addition/Subtraction Multiplication/Division Comparison Miscellaneous Illustrative examples Outline S. Dandamudi
Introduction • Three components • Sign • Identified the number • positive or negative • Mantissa • Exponent • Follows IEEE 754 standard • More details in Appendix A S. Dandamudi
FPU Organization • FPU consists of • Data registers • 8 registers ST0, ST1, …, ST7 • Organized as a register stack • Names are not statically assigned • Control and status registers • Pointer registers • Instruction and data pointer registers • Provides support for programmed exception handlers • Not discussed S. Dandamudi
FPU Organization (cont’d) FPU Registers S. Dandamudi
FPU Organization (cont’d) FPU Control Register S. Dandamudi
FPU Organization (cont’d) FPU Status Register S. Dandamudi
FPU Organization (cont’d) • FPU Tag Register • Two bits for each register • Gives the following information 00 valid 01 zero 10 special (invalid, infinity, or denormal) 11 empty S. Dandamudi
Floating-Point Instructions • Several floating-point instructions for • Data movement • Addition/Subtraction • Multiplication/Division • Comparison • Miscellaneous • These instructions, by default, affect the flags as follows: • Flag bits C0, C2, and C3 are undefined • C1 is updated to indicate overflow/underflow condition S. Dandamudi
Floating-Point Instructions (cont’d) • Data movement • Two types • Load and store • Load instructions fld src • Pushes src onto the FPU stack • src operand can be in a register or in memory • It can be a single-precision (32 bits), double-precision (64 bits) or extended (80-bit) floating-point number • Single- and double-precision numbers are converted to extended format S. Dandamudi
Floating-Point Instructions (cont’d) • FP Instructions to push constants Instruction Description fldz Push +0.0 onto the stack fld1 Push +1.0 onto the stack fldpi Push p onto the stack fldl2t Push log210 onto the stack fldl2e Push log2e onto the stack fldlg2 Push log102 onto the stack fldln2 Push loge2 onto the stack • To load an integer: fild src S. Dandamudi
Floating-Point Instructions (cont’d) • Store instructions fst dest • Stores the top-of-stack value at dest • Does not pop it off the stack • To the value use fstp dest • Integer version of the store instruction fist dest • Its pop version is fistp dest S. Dandamudi
Floating-Point Instructions (cont’d) • Addition fadd src • adds the number in memory at src to that in ST0 and stores the result in ST0 • Does not pop the stack • Two operand version fadd dest,src • Both dest and src must be FPU registers • Its pop version faddp dest,src • Integer version fiadd src S. Dandamudi
Floating-Point Instructions (cont’d) • Subtraction fsub src • Performs ST0 = ST0 - src • Does not pop the stack • Two operand version fsub dest,src • Both dest and src must be FPU registers • Its pop version fsubp dest,src • Reverse subtract version fsubr src • Performs ST0 = src – ST0 S. Dandamudi
Floating-Point Instructions (cont’d) • Multiplication fmul src • Performs ST0 = ST0 * src • Does not pop the stack • Two operand version fmul dest,src • Both dest and src must be FPU registers • Its pop version fmulp dest,src • Special pop version with no operands fmulp Performs ST0 = ST1 * ST0 • Multiplication by integer fimul src S. Dandamudi
Floating-Point Instructions (cont’d) • Division fdiv src • Performs ST0 = ST0 / src • Does not pop the stack • Two operand version fdiv dest,src Performs dest = dest/src • Both dest and src must be FPU registers • Its pop version fdivp dest,src • Reverse division version fdivr src Performs ST0 = src / ST0 • Multiplication by integer fidiv src S. Dandamudi
Floating-Point Instructions (cont’d) • Comparison fcom src • Compares the value in ST0 with src and sets the FPU flags C0, C2, and C3 as follows Relationship C3 C2 C0 ST0 > src 0 0 0 ST0 = src 1 0 0 ST0 < src 0 0 1 Not comparable 1 1 1 • Double pop version fcompp • Compares ST0 and ST1 and pops these two values from the stack S. Dandamudi
Floating-Point Instructions (cont’d) • Comparison (cont’d) • Comparison with an integer ficom src • Comparison with zero ftst • To examine number type fxam • Examines the number in ST0 and returns its sign in C1 (0 for positive, 1 for negative) • C0, C2, and C3 return the following information Type C3 C2 C0 Unsupported 0 0 0 NaN 0 0 1 Normal 0 1 0 Infinity 0 1 1 Zero 1 0 0 Empty 1 0 1 Denormal 1 1 0 S. Dandamudi
Floating-Point Instructions (cont’d) • Miscellaneous • Change the sign fchs • Changes the sign of the number in ST0 • Loading the control word fldcw src • Storing the control word fstcw dest • Storing the status word fstsw dest S. Dandamudi
Illustrative Examples • Example 1 • Array sum • Example 2 • Quadratic equation solution • Example 3 • Array sum --- Inline version Last slide S. Dandamudi