660 likes | 917 Views
http:// proglit.com /. hardware and operating systems basics. SA. BY. client/workstation (PC) server (responds to requests from network) hand-held (phone, audio player) embedded system (toaster, car) mainframe (a big server) supercomputer (a many-processor system).
E N D
hardware and operating systems basics
SA BY
client/workstation (PC) • server (responds to requests from network) • hand-held (phone, audio player) • embedded system (toaster, car) • mainframe (a big server) • supercomputer (a many-processor system)
RAM (Random Access Memory) • addressable by the CPU • volatile • faster than storage • code and data of • running programs
programming model (simplified conception of a processor for sake of programmers)
instruction • copy bytes • arithmetic • bit logic • jumps (a sequence of bits understood by the processor to signal a certain action)
register (a small memory area in a processor) • status • general purpose
ISA (Instruction Set Architecture) x86 (IA-32, x86-64) ARM MIPS Motorola 68k
code call stack (local variables) program memory heap (everything else)
top of stack frame of lama top of stack frame of bird top of stack • local variables • argument values frame of fish stack space top of stack frame of dog top of stack frame of cat top of stack frame of main
top of stack frame of moose top of stack frame of bird • local variables • argument values • return address frame of fish stack space frame of dog frame of cat frame of main
big-endian vs. little-endian (the order in which the bytes of a register are copied from registers to memory and vice versa)
big-endian vs. little-endian (the order in which the bytes of a register are copied from registers to memory and vice versa)
capacity processor registers processor cache random access memory hard drives speed, cost
device registers read/write CPU
port-mapped I/O vs. memory-mapped I/O output register 2 to port 0x44 98 copy register 5 to address 0x66 2C 1A 32
memory addresses 0xFF FF FF FF RAM byte n byte 0 0x00 00 00 00 ports devices port n port 0
memory addresses 0xFF FF FF FF RAM byte n byte 0 0x00 01 00 00 devices 0x00 00 FF FF 0x00 00 00 00
polling (code periodically checks device registers to see if the device needs the CPU to do something)
device interrupt line registers CPU
polling interrupt • device sends interrupt signal to CPU • CPU saves state of whatever it was currently doing • CPU jumps to address corresponding to interrupt number in the interrupt table (code periodically checks device registers to see if they need the CPU to do something)
… … interrupt 7 0xFF 31 01 11 interrupt 6 0xFF 90 44 44 interrupt 5 0xFF 31 01 11 interrupt 4 0xFF 31 21 14 interrupt 3 0xA2 22 00 10 interrupt 2 0x82 87 95 94 interrupt 1 0x20 15 10 00 interrupt 0 0x76 00 00 00
polling interrupt • device sends interrupt signal to CPU • CPU saves state of whatever it was currently doing • CPU jumps to address corresponding to interrupt number in the interrupt table • CPU returns to whatever it was doing before the interrupt (code periodically checks device registers to see if they need the CPU to do something)
hardware exception … … exception 4 0xFF 31 21 14 (a condition which causes the CPU to jump to a pre-determined address) exception 3 0xA2 22 00 10 exception 2 0x82 87 95 94 exception 1 0x20 15 10 00 exception 0 0x76 00 00 00
Instruction Set Architecture byte size word size address size cache speeds and sizes big-endian vs. little-endian ports vs. memory-mapped i/o number of processors/cores
boot firmware BIOS registers CPU
boot firmware BIOS registers CPU
operating system • load and manage processes • provide “interfaces” to hardware via system calls • provide a filesystem • provide a basic user interface (manages the hardware and running programs)
Windows (series of OS’s from Microsoft) • Windows 7 • Windows Server 2008 • Windows CE
Unix • Linux • BSD • OS X (a family of OS’s)
device driver OS (plug-in to the OS to control a particular device) software driver driver driver device device device hardware
process OS B A B A B A B C C CPU time A C C C C B A B CPU 2
pre-emptive multitasking CPU receives interrupt interrupt stores state of currently running code interrupt invokes handler interrupt handler invokes the scheduler scheduler selects a process scheduler “configures” CPU for that process scheduler jumps execution to that process
0xFF FF FFFF Process A Process B Process C OS 0x00 00 00 00
0x FF FFFFFF stack RAM byte n heap heap byte 0 heap code 0x 00 00 00 00
0x FF FFFFFF stack RAM byte n heap heap byte 0 heap HD code 0x 00 00 00 00
Process A Process B RAM jump to system call code via special instruction Process C OS