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Lecture 10

Lecture 10. make. Using make for compilation. With medium to large software projects containing many files, it’s difficult to: Type commands to compile all the files correctly each time Keep track of which files have been changed Keep track of files’ dependencies on other files

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Lecture 10

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  1. Lecture 10 make

  2. Using make for compilation • With medium to large software projects containing many files, it’s difficult to: • Type commands to compile all the files correctly each time • Keep track of which files have been changed • Keep track of files’ dependencies on other files • The make utility automates this process

  3. How make works • Reads a file called [Mm]akefile, which contains rules for building a “target” • If the target depends on a file, then that file is built • If that file depends on a third file, then the third file is built, and so on… • Works backward through the chain of dependencies • Targets only built if they are older than the files they depend on

  4. Types of lines in Makefiles • Dependency or rules lines • Commands • Macro assignments • Comments

  5. Dependency/rules lines • Specify a target and a list of prerequisites (optional) for that target target : prereq1 prereq2 prereq3 …

  6. Command lines • Follow dependency lines • MUST start with a TAB! • Any command that can be run in the shell can be placed here target : prereq1 prereq2 command1 command2

  7. Special variables in commands • $@represents the target • $? represents prereqs that are newer than target • $^ All dependencies, regardless of whether new or not, but no duplications • $< The name of the first dependency. • $+ Keep duplications and print all dependencies • OBJ=${SRC:.c=.o) replace *.c in SRC to *.o • SRC=$(wildcard *.c) : SRC is all *.c file in current folder • SRC=$(filter-out target.c $(wildcard *.c)) SRC contains all the *.c files, except the target.cfile http://www.gnu.org/software/make/manual/html_node/Automatic-Variables.html#Automatic-Variables has a complete list

  8. Simplified Makefile example program : main.oiodat.odorun.o g++ -o $@ main.oiodat.odorun.o main.o : main.cc g++ -c $? iodat.o : iodat.cc g++ -c $? dorun.o : dorun.cc g++ -c $?

  9. Macro (variable) assignments • You can use macros to represent text in a Makefile • Saves typing • Allows you to easily change the action of the Makefile • Assignment: MACRONAME = macro value • Usage: ${MACRONAME}

  10. Simplified Example Makefile with macros OBJS = main.o iodat.o dorun.o CC = /usr/bin/g++ program : ${OBJS} ${CC} -o $@ ${OBJS} main.o : main.cpp ${CC} -c $? iodat.o : iodat.cpp ${CC} -c $? dorun.o : dorun.cpp ${CC} -c $?

  11. Comments and other Makefile notes • Comments begin with a ‘#’ • Lines that are too long can be continued on the next line by placing a ‘\’ at the end of the first line

  12. Invoking make • Be sure that your description file: • is called makefile or Makefile • is in the directory with the source files (to simplify) • make (builds the first target in the file) • make target(s) (builds target(s)) • All : the default targets for makefile • Important options: • -n: don’t run the commands, just list them • -f file: use file instead of [Mm]akefile

  13. Other useful Makefile tips • Include a way to clean up your mess: %make clean • No dependencies clean: /bin/rm -f *.o core

  14. Example CC = gcc OBJS = mycode1.o mycode2.o CFLAGS = -c -O3 -g -Wall LFLAGS = -O3 -g -Wall all: ${OBJS} <TAB> ${CC} ${LFLAGS} ${OBJS} -o MultiFileCode mycode1.o: mycode1.c <TAB> ${CC} ${CFLAGS} mycode1.c mycode2.o: mycode2.c <TAB> ${CC} ${CFLAGS} mycode2.o

  15. Improved Example CC = gcc OBJS = mycode1.o mycode2.o CFLAGS = -c -O3 -g -Wall LFLAGS = -O3 -g -Wall all: ${OBJS} <TAB> ${CC} ${LFLAGS} ${OBJS} -o MultiFileCode .c.o: <TAB> ${CC} ${CFLAGS} $<

  16. Conditional statement libs_for_gcc= -lgnu normal_libs = foo: $(objects) ifeq($(CC),gcc) $(CC) -o foo $(objects) $(libs_for_gcc) else $(CC) -o foo $(objects) $(normal_libs) endif Compare if $(CC) is gcc, to determine which library to link

  17. Autotools : GNU build system

  18. CMake : cross platform make • works on windows/linux/Mac, • even ios, android .. • Project contains a CMakeLists.txt • command to build • mkdir build //the build folder • cd build //go there • cmake .. //arg is the main folder

  19. Examine real projects • googlec++ test framework http://code.google.com/p/googletest/

  20. Reference • There are much more advanced features in the manual http://www.gnu.org/software/make/manual/

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