High-performance packet classification algorithm for multithreaded IXP network processor

1. High-performance packet classification algorithm for multithreaded IXP network processor Authors: Duo Liu, Zheng Chen, Bei Hua, Nenghai Yu, Xinan Tang Presenter: Fang-Chen, Kuo Date: 2008/07/09 Publisher/Conf. : ACM Transactions on Embedded Computing Systems (TECS) 2008 Dept. of Computer Science and Information Engineering National Cheng Kung University, Taiwan R.O.C.

3. Classification Scheme • Apply a compression technique to RFC’s cross-producting tables to reduce the data redundancies; • Exploit the NPU architectural features to achieve high classification speed, especially at 10 Gbps or higher on Intel IXP 2800.

4. Reduction Tree (1) • Phase 0 contains 6 chunks: • chunk 0 uses the high 16 bits of source IP address, chunk 1 uses the low 16 bits of source IP address, • chunk 2 uses the high 16 bits of destination IP address, chunk 3 uses the low 16 bits of destination IP address, • chunk 4 uses source port, and chunk 5 uses destination port; • Phase 1 contains 2 chunks: • Chunk 0 (CPT X) of phase 1 is formed by combining chunk 0, 1, 4 of phase 0; • Chunk 1 (CPT Y) of phase 1 formed by combining chunk 2, 3, 5 of phase 0; • Phase 2 contains 1 chunk: • Chunk 0 (CPT Z) of phase 2 is formed by combining the two chunks of phase 1.

5. Reduction Tree (2) Phase_0 Phase_1 Phase_2 SA_H16 SA_L16 CPT-X SP CPT_Z DA_H16 DA_L16 CPT_Y DP

6. Bitmap-RFC

7. Data structure for Bitmap-RFC algorithm

8. Implementation Issues • Memory Space Reduction • Instruction Selection • POP_COUNT • Multiplication Elimination • Data Allocation • Task partitioning • Latency Hiding

9. Experiment: Memory Requirement

10. Experiment:Classifying Rates (1)

11. Experiment:Classifying Rates (2)