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Efficient Hardware dependant Software (HdS) Generation using SW Development Platforms

Efficient Hardware dependant Software (HdS) Generation using SW Development Platforms. Frédéric ROUSSEAU. CASTNESS‘07 Computer Architectures and Software Tools for Numerical Embedded Scalable Systems Workshop & School Roma January 15-17th 2007. Summary. Context:

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Efficient Hardware dependant Software (HdS) Generation using SW Development Platforms

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  1. Efficient Hardware dependant Software (HdS) Generation using SW Development Platforms Frédéric ROUSSEAU CASTNESS‘07 Computer Architectures and Software Tools for Numerical Embedded Scalable Systems Workshop & School Roma January 15-17th 2007

  2. Summary • Context: • Current multimedia applications require heterogeneous MPSoC • DSP + µC + sophisticated communication infrastructure • Multiple software (SW) stacks • Multiple layers: Application SW code + HdS (Hardware dependent Software) • Specific architecture/application HdS to achieve efficiency • Problems: • Classic SW development platforms do not fit: High level programming environment is not efficient to handle specific architecture capabilities • HdS is Application/OS/architecture specific • Challenges: • Efficient HdS generation • Efficient and fast SW development platforms • Contribution: • Specific HdS generation for Diopsis • Specific SW development platforms for SW debug and validation

  3. Task n Task 2 Task 1 HDS API Comm OS HAL API HAL HdS generation • Hardware dependant Software (HdS) is composed of different layers • Operating System (OS) • Communication primitives • Hardware Abstraction Layer (HAL) • Application Programming Interface (API) • Why do we need HdS automatic generation ? • Application/OS/Platform specific HdS • Difficulties • Validation and debug (of each layer) • HdS is used as an abstraction of HW by the application code • Requires HW and SW knowledge Tasks HdS

  4. Fully explicit HW/SW Interface Fully implicit HW/SW Interface GAP Software design High Level App. model Partition ning Integration Abstract HW/SW Interface Functional specification ISA/RTL Early HW/SW integration Hardware design Correction cycle Classical HW/SW Interfaces Abstraction Models: The GAPS Software development platform Virtual Prototype Hardware/Software discontinuity

  5. SW Development Platforms & HdS High level application model (tasks + mapping) • High level application model • System architecture(SA) model • Implicit communication • Virtual architecture (VA) • Final application code & HdS API • Explicit communication • Explicit mapping to execution subsystems • Implicit execution models & task control • Transaction accurate architecture (TA) • Explicit OS, specific I/O, HAL API • Explicit communication and peripherals • Abstract computation model of CPU • Virtual prototype • Explicit execution models (CPU, communication) • HdS implements com. API & task control over OS and architecture HdS Library Virtual architecture HdS generation (TIMA) Transaction accurate architecture Virtual prototype

  6. SW development platform generation Abstraction SW Development Platforms & HdS High level application model (tasks + mapping) • High level application model • System architecture(SA) model • Implicit communication • Virtual architecture (VA) • Final application code & HdS API • Explicit communication • Explicit mapping to execution subsystems • Implicit execution models & task control • Transaction accurate architecture (TA) • Explicit OS, specific I/O, HAL API • Explicit communication and peripherals • Abstract computation model of CPU • Virtual prototype • Explicit execution models (CPU, communication) • HdS implements com. API & task control over OS and architecture HdS Library Virtual architecture HdS generation Transaction accurate architecture Virtual prototype D940 Diopsis tile

  7. Software design flow in SHAPES High level application model (tasks + mapping) Application mapping (ETH) Application HdS Library Architecture Virtual architecture HdS generation SW development platform generation Transaction accurate architecture Abstraction Virtual prototype (Aachen) D940 Diopsis tile

  8. Detailed contributions • Abstraction of the RDT Diopsis Tile • With the specific communication schemes • At different abstraction levels (Virtual and Transaction levels) • Software development Platforms generation • Debug and validation of the different SW stacks and layers • Different abstraction levels • HdS Generation • From a high level application model • Using the specific communication schemes of Diopsis

  9. HdS generation SW development platform generation Abstraction Next presentations High level application model (tasks + mapping) • SW Development Platform generation • Efficient SW Development Platform for Multimedia Applications by Katalin Popovici • HdS generation • Software Code Generation from a Simulink Application Model by Xavier Guérin • Demo • Application of Software Code Generation Flow from Simulink to Diopsis Platform by Katalin Popovici HdS Library Virtual architecture Transaction accurate architecture Virtual prototype D940 Diopsis tile

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