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Efficient FSM Simplification and Minimization Techniques for Odd Parity Checking

Learn FSM simplification and minimization methods for odd parity checking, including collapsing states and row matching. Explore the implication chart and a more complex yet manageable algorithm. Design a Mealy machine for pattern detection.

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Efficient FSM Simplification and Minimization Techniques for Odd Parity Checking

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  1. Lecture 20 • FSM simplification

  2. FSM minimization • Two simple FSMs for odd parity checking

  3. Collapsing states • Can collapse S0 and S2 into one state

  4. FSM minimization • Row matching • Easier to do by hand • Misses minimization opportunities • Implication chart • Guaranteed to find the most reduced FSM • More complicated algorithm (but still relatively easy to write a program to do it)

  5. Simple problem • Design a Mealy machine with a single bit input and a single bit output. The machine should output a 0, except once every four cycles, if the previous four inputs matched one of two patterns (0110, 1010) • Example input/output trace:in: 0010 0110 1100 1010 0011 …out: 0000 0001 0000 0001 0000 …

  6. … and a simple solution

  7. Find matching rows

  8. Find matching rows

  9. Merge matching rows

  10. Merge until no more matches

  11. Final state transition table

  12. Final FSM

  13. Row matching not optimal • Again, the two FSMs for odd parity checking

  14. No rows match!

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