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CIS(CMOS Image Sensor) Testing Introduction. Basic Introduction CIS Function CIS Test Item CIS Test System Production Issue. Contents. -What is CIS -Digital Imaging Principle -The Comparison Between CCD and CIS. Basic Introduction. Digital camera. Digital camera. CCD. CIS. CCD.
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Basic Introduction CIS Function CIS Test Item CIS Test System Production Issue Contents
-What is CIS -Digital Imaging Principle -The Comparison Between CCD and CIS Basic Introduction
Digital camera Digital camera CCD CIS CCD CCD What is CIS CIS(CMOS Image Sensor)
Note PC PDA Mobile Phone Wristwatch Camera CCD / CMOS Camera Module Digital Camera In-vehicle Camera CCD / CMOS Image Sensor Video Camera Security Camera Fingerprint/Pupil User Authentication Copy Machine Facsimile/Scanner Application for CIS
Digital Imaging Principle Image Edit & Color Correction .JPG .BMP YUV Image Sensor + Analog Circuit + ADC Pre-Image Signal Processor Post-Image Signal Processor Application Processor Base-band MCU LCD Controller + Driver LCD Display
The Comparison Between CCD and CIS • Neither CIS nor CCD have anything to do image sensing • Both CIS and CCD have same sensor called “Photo Diode” • The difference between CIS and CCD is different method • and process for data readout
-System Block -CIS Function Diagram -CIS Action CIS Function
System Block LCD/TV DSP Video Encoder CDS ADC AGC CMOS Image Sensor USB IEEE1394 PCMCIA Interface Storage Device Timing Generator Memory USB IEEE1394 PCMCIA PC
Function Diagram • Digital Control Logic Data rate > 40MHz • Image Sensor Pixel number > 4M • Digital / Analog Output Pixel rate > 30MHz / 1port Port number 1 ~ 4 CLK Driver(PLL) On-chip Regulator Image Sensor Digital Control Logic CDS Gain Encoder ADC Output Buffer
Passive Sensor: Advantage: Simple circuit(one transistor) Large sensor area Disadvantage: Loading is higher Random noise is big Active Sensor: Advantage: Electron convert voltage directly in each pixel Reduce random noise Disadvantage: Small sensor area Amplifier character is different in each pixel Fixed pattern noise
CDS CDS(Correction Double Sampling) + _ Vout Vin Delay T
Original CIS Signal CLK1 CLK2 CDS Output
Frame Capture Pre_charge Exposure CDS Pixel Readout Line Capture Pre_charge Exposure CDS Pixel Readout Next Line Pre-charge Device Action Description
Serial Scanning • Pre_charge • Exposure • CDS • Pixel Readout • Next Pixel Readout • Random addressing • Line Select • Pre_charge • Exposure • CDS • Pixel select • Pixel Readout
Device Timing Diagram FEN: VSync LEN: HSync
DC/Function Test ADC Test Image Test(Dark,Standard Light,Saturation,Color) Image Processor Library CIS Test Item
Continuity Leakage Power Consumption DC Test Function Test • I2C Write/Read • DSP Pattern
Offset Gain INL / DNL THD S / N ADC Test
Code INL/DNL: ADC Linearity Test V input LSB : (V full scale -1__full scale_trans - V 0_1_trans) / (Full scale –2 ) DNL: Max( (( V real_trans(Code+1)-V real_trans(Code))/LSB)-1) INL : Max( ( V real_trans(Code)-V ideal_trans(Code))/LSB)
V V V t t t P P P code code code Separate ADC Block and Measure the Performance We can send three types of signal to ADC input: Sine Ramp Triangulate Note : 取整數Cycles
Dark Mean Level Dark Sigma Dark Column Variation Dark Row Variation Dark uniformity Dark Defect Pixel Dark Adjacent Defect Pixel Dark Current Dark Test
Row/Column Variation • Check the variation between each line and whole fame • Check the variation between line and line • Check the variation between Max. line and Min. line • Check defect count in each line
Dark uniformity • Get Mean Level of • 5 areas (Center, Top_right, Top_left, Bottom_right, Bottom_left ) • 16 areas (4*4) • Then calculate (Max –Min) / Dark Mean Level
Dark Current (Dark_level1-dark_level2)/(0.255-0.02) Dark_level1 : Exposure:255ms Dark_level2 : Exposure:20ms Response 20 255 Exposure Time(ms)
Mean Level ( Light, R, G, B ) Sigma ( Overall, R, G, B ) S/N ( Overall, R, G, B ) Column Variation (R, G, B ) Row Variation (R, G, B ) Uniformity (R, G, B ) Defect Pixel (Overall):Defect judge by R, G, B independently Adjacent Defect Pixel : Depend on Request (Overall ) Ps1: G1, G2 maybe need to be separated Ps2: Light Source ( Lux & Exposure_time) : Saturation*10% , Saturation*60% Standard Light Test
Saturation Mean Level (Overall, R, G, B ) Dynamic range (R, G, B) 20 * log( V_sat / V_noise) Saturation Test
R (G, B)Mean Value in R Light R (G, B)Sigma in R Light Prime Response in R Light Cross Response in R Light Ps: In G(B) Light is same as in R Light Color Frame Test
Prime Response in R Light (Light R Mean – Dark R Mean) / (Light Overall Mean – Dark Overall Mean) Cross Response in R Light ((Light G(B) Mean – Dark G(B) Mean) / (Light R Mean – Dark R Mean)
ipSetCFL Tiling Bayer Pattern Color Filter Layout • ipSetCFL • Create User‘s Custom Color Layout
Image Processing Functions ipColorSelectImage ipColorMergeImage Original CFL Frame Processed CFL Frame Each Color Frame Processed Frame • Separate & Merge the Color Frame • ipColorSelectImage, ipColorMergeImage
Rectangular ROI Setting Handle ID of Image Data Color Information Setting Y Image Data X Setting the Valid area • ipSetArea
source Sum of Values Line Number Sum of Line sum[0] = 3 sum[1] = 30 sum[2] = 60 sum[3] = 110 0 1 2 3 ipHsum Rectangular ROI source Sum of Values Column Number Sum of Column sum[0] = 60 sum[1] = 60 sum[2] = 70 sum[3] = 60 0 1 2 3 ipVsum Rectangular ROI Getting Sum of Pixel Values in Each Line/Column • ipHsum( source, sum):Gets the sum in each line. • ipVsum( source, sum):Gets the sum in each column.
Build Convolution Filter : For 5 * 5: Low Pass * High Pass
Normalize Micro Lens Shift By low pass filter:
System Structure IP Module Illuminator(Light Source) Main System Analog Module(option) Debug Tool CIS Test System
Main System Sync Control & Result Control Signal Sync IP Module (Frame Grabber included) Sync DUT Data Bus Light Source Data Analog Module Analog Waveform Prober / Handler System Structure
Docking method: Light source connect with testhead directly
AC Power Docking with Handler (Cable system) Testhead Cable system Top View PIB (Prober Interface Board) illuminator Prober
Docking with Handler (Cable system) Side View Cable system DIB (Device Interface Board Handler Testhead illuminator
Test Head IP Module 32 pins IP Cabinet Digital max. Image Frame Grabber Board IP Data I/F CRT & Keyboard IP Controller 5pins: Timing Control & Setup Tester Cabinet CRT & Keyboard DC Test Functions Master Clocks Digital Pins Digital Test Functions DC Pins DUT LF/HF/VHF Pins Analog Test Functions UIP TC Time Measurement Light Source Controller IP Module
IP Module Specification • Image Data Pinpin counts|: > 16pinsdata Rate: > 40MHzdata Depth: > 12M • Imaging Method • HW imaging(Frame Grabber Board) • SW imaging
Illuminator Light Source Structure AGC