Chapter 1 Microprocessor Architecture and System Concepts

1. Chapter 1Microprocessor Architecture and System Concepts

2. How to improve microprocessor speed • Processor wordlength • More bits can be processed internally in parallel • Input clock • Level of integration • Reduce communication overhead between chips • Width of external data bus • Increase processor-to-memory bandwidth • Architecture advances • Pipelined, superpipelined, superscalar

3. Microprocessor Performance • Based on the instruction features, microprocessor can be divided to • CICS (complex instruction set computer) • RISC (reduced instruction set computer) • Processor performance • The unit is MIPS (million instructions per second) Processor performance (in MIPS) = F/CPI F: clock rate in MHz CPI: average clock cycle per instruction EX: if operating clock is 40 MHz, the average instruction requires 2 clock cycles, the performance is 20 MIPS The processing time of the program is NI * CPI * C NI: number of instruction in the program C: clock cycle time

4. System Issues(1) • The modules of a bus-based microprocessor system are divided into two broad classes • Bus master device: • gain control of the bus and are able to initiate data transfers by dividing the address and control lines • Bus slave device • Not capable of controlling the bus • Simple decode the address line and act upon the control signals it receives from the master

5. System Issues (2): Components • Required main components: • Clock generator • Main memory unit • Coprocessor • MMU (memory management unit) • I/O unit • Communicate with an external device • I/O mapped I/O • Special input and output instruction • Memory mapped I/O • Use memory type instruction to perform the I/O operation

6. I/O Mapped I/O • 每一個控制器上的暫存器都被給定一個特殊的 I/O 埠。 • Intel 的 IN 跟 OUT 指令可以用來分別讀出或寫入暫存器的值。 CPU AX 控制器 I/O埠 0x68 Outw AX, 0x68 0x15D4 0x15D4

7. 記憶體 0x0000 0xF000 0xFFFF CPU movw 0xF000, BX movw AX, [BX] AX 0x15D4 控制器暫存器 位址0xF000 0x15D4 Memory Mapped I/O • 記憶體對映 I/O 是將週邊設備的暫存器映對到記憶體位址空間。 • CPU 在存取這些暫存器時，就像是在存取記憶體裡面的值一樣。

8. 直接記憶體存取 (DMA) • 沒有 DMA 的控制器若想要存取記憶體中的資料，就必須依賴 CPU 的幫忙。 • DMA 控制器的兩個特性 • 可以不經由 CPU 就能存取到記憶體。 • 一次可以處理一整個區塊的資料。

9. CPU 記憶體 匯流排 無DMA的裝置控制器 有DMA的裝置控制器 I/O裝置 I/O裝置 I/O裝置 DMA存取路徑 無DMA存取路徑 資料可傳遞路徑 DMA存取路徑

10. How to improve processor performance • Processor performance (in MIPS) = F/CPI • Under constant clock rate  to reduce CPI • How to reduce the CPI • Based on the temporal parallelism • Multiple instructions are simultaneously overlapped in execution using one common hardware • Pipelined, superpipelined • Based on the spatial parallelism • Using separate hardware to execute multiple instructions • superscalar

11. pipelining

12. Data dependencies and control hazards along with the execution of conditional-branch instructions

13. Superpipelined

14. Superpipelined

15. Superscalar