Introduction to MRAM and its Applications

1. Introduction to MRAM and its Applications

2. Industry First - Freescale’s 4Mb MRAM General Specification • Non-volatile memory with unlimited read-write endurance • Non-destructive read/write • Symmetrical 35ns Read/Write access time • Bitwise erasable (28 Mb/s) • Data Retention >10 Years • 256Kx16bit organization • 3.3V single power supply • Fast SRAM compatible pinout (center power and ground) • Commercial Temperature (0-70°C) • RoHS Compliant TSOP type-II package • Flexible Data Bus (8/16-bit access) • LVI prevents writes on power loss • I/O TTL compatible • Fully static operation MR2A16A

3. Nonvolatile Fast Viable MRAM Advantages Data Retention - > 10 years Stable & Reliable - Data stored by polarization not charge Symmetrical Read/Write Byte writeable – bit level granularity 35ns for 4Mb at 0.18um technology node Unlimited Cycles Unlimited Endurance -  1016 Non-destructive read – no wearout, no leakage, no soft errors • Integrated with Existing CMOS Baseline • Compatible with Embedded Designs • Highly Reliable

4. Reliability Leadership • Endurance cycling has reached 58 trillion cycles with no change in critical parameters. • Data from >2800 bits from 900 devices • 8 orders of magnitude more cycles than current Flash technology • No known failure modes are seen or expected. Flash Capability

5. MRAM Product Roadmap 16Mb 8Mb 4Mb 1Mb Available Now Coming Soon Proposed 8/16M,35Ns 119PBGA -40-105C MR2A16A 4Mb,35nS 44-pin TSOP 0-70C MR2A16A 4Mb,35nS 44-pin TSOP -40-105C July 2007 1/4Mb 0-70C BGA 1Mb,35nS 48-pin TSSOP 0-70C 1Mb -40-105C 512Kb/256Kb 2006 2007 2008+

6. MRAM Basics

7. How MRAM Works • Information is stored as magnetic polarization, not charge • The state of the bit is detected as a change in resistance Magnetic layer 1 (free layer) S N N S Tunnel barrier S N S N Magnetic layer 2 (fixed layer) Magnetic vectors are parallel – low resistance. “0” Magnetic vectors are anti-parallel – high resistance. “1”

8. Read Mode ISense Isolation Transistor “ON” 1 T-1 MTJ MRAM memory cell operation - read To read an MRAM bit, current is passed through the bit and the resistance of the bit is sensed.

9. “Write Mode” Easy Axis Field IEasy Free Layer Tunnel Barrier Fixed Layer Hard Axis Field IHard Isolation Transistor “OFF” 1 T-1 MTJ MRAM memory cell operation - write To write an MRAM bit, current is passed through the programming lines generating magnetic fields. The sum of the magnetic field from both lines is needed to program the bit. No moving parts.

10. 4Mb Memory Cell i Program path for Writing information i Sense Path for bit cell reading M5-BL TE TVia TJ V4 MVia M4-DL BE V3 M3 V2 M2 Thk Oxide Xtor Pass Xtor Pass Xtor Group Select V1 M1 N+ N+ N+ N+ N+ N+ N+ P- Layer Name TJ TVia M4-DL Via1-4 BE M1-3 MVia TE M5-BL

11. Freescale……. Technology Leadership Metal 5 MRAM module Metal 4 Via 3 MRAM BEOL CMOS FEOL Metal 3 MTJ Metal 5 Via 2 Metal 2 Via 1 Metal 4 Metal 1 Contact Bit cell

12. MRAM – Functional Operation

13. Toggle Bit Technology

14. Toggle MRAM Bit Cell BL Program Line Program Line 2 Bit Line Bit Line Ferromagnetic layer Free Tri Free Tri - - Layer Layer Coupling Layer Ferromagnetic layer Tunnel Barrier Tunnel Barrier Pinned Ferromagnetic Pinning Layer Pinning Layer DL Program Program Line 1 Line

15. Conventional Free Layer H=0 H=0 H¹0 Tri-Layer Coupled Free Layer H¹0 H=0 Free Layer Field Response

16. Hard Axis Easy Axis Write Line 1 (H1) Write Line 2 (H2) Elements of Toggle Bit • Balanced SAF free-layer • Bit oriented 45º to lines • Unipolar currents • Overlapping pulse sequence • Pre-read / decision write

17. H H 2 2 I I 2 2 I I H H 1 1 1 1 Toggle MRAM Switching Sequence Hard Hard Hard Hard Hard Hard Hard Hard Hard Hard Hard Hard Hard Hard Hard Easy Easy Easy Easy Easy Easy Easy Easy Easy Easy Easy Easy Easy Easy Easy Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Axis Write Line 1 Write Line 1 Write Line 1 Write Line 1 WriteLine1 Write Line 2 Write Line 2 Write Line 2 Write Line 2 Write Line 2 Write Line 1 On Off On Write Line 2 Off t2 t1 t3 t4 t0

18. Competition, Applications & Product Timeline

19. Initial Competitive Markets for MRAM • Competition is limited to those memory technologies that have the same attributes of MRAM: • Non-volatility • High Read/Write Performance • High Read/Write Endurance SRAM – Not non-volatile DRAM – Not non-volatile Flash – Low write performance, poor endurance FeRAM – Limited performance, limited endurance BBSRAM – Functionally compatible

20. MR2A16ATS35C Key Features • Key Features • High performance – symmetrical read and write timing • Small size and scalable for future technologies • Nonvolatile with virtually unlimited read-write endurance • Low leakage and low voltage capable

21. Competitive Devices

22. MR2A16ATS35C Competitive Analysis Supplier Technology Part Number Density Config Speed Read Current Temperature Qty Price Freescale MRAM MR2A16A 4Mb 256Kbx16 35ns 55 mA 0 to 70C 1000 $ 22.50 Ramtron FRAM FM20L08-60-TGC 1Mb 128Kbx8 350ns 22 mA -40C to 85C small $ 17.83 STM BBSRAM M48Z512AY-70PM1 4Mb 512Kx8 70ns 115 mA 0 to 70C small $ 70.00 BBSRAM 497-2886-5-ND 4Mb 512Kx8 70ns 115 mA 0 to 70C 5000 $ 42.00 Maxim (Dallas) BBSRAM DS1250AB-100+ 4Mb 512Kx8 100ns 85 mA -40C to 85C 100 $ 52.34 BBSRAM DS1250AB-100+ 4Mb 512Kx8 100ns 85 mA -40C to 85C 1000 $ 48.15 BBSRAM DS1250AB-70+ 4Mb 512Kx8 70ns 85 mA -40C to 85C 100 $ 52.85 BBSRAM DS1250AB-70+ 4Mb 512Kx8 70ns 85 mA -40C to 85C 1000 $ 48.63 STK14CA8-RF25I $24.72 SimTek nvSRAM 1Mb 128Kbx8 25ns 70 mA -40C to 85C small STK14CA8-RF45I $20.64 nvSRAM 1Mb 128Kbx8 45ns 55 mA -40C to 85C small STK14CA8-RF45 $17.19 nvSRAM 1Mb 128Kbx8 45ns 55 mA 0C to 70C small

23. Sample Application – Battery Backed SRAM Replacement “Built-in-house” Components MCU • Problems • System design complexity • Board space and weight • Battery life • Manufacturing complexity • Environmental concerns MCU Addr/Data Bus SRAM Addr/Data Bus Battery CE Control Chip MRAM • Solutions • Single chip solution • Simple, low cost system design • Manufacturing simplification • No battery • Unlimited life • Smaller profile • Higher performance • Environmentally friendly • Problems • Cost • Manufacturing complexity • Battery life • Low performance • Environmental concerns MCU Battery Addr/Data Bus SRAM “Off-the-shelf” components

24. Primary Usage Data Logging Parameter Storage System Status Storage Buffers Target Application – Battery Backed SRAM Replacement More Parts & Labor & Board Space & Weight System Design Complexity • Battery Contact Failure • Out-of-Tolerance Voltage Spikes • Limited Life Manufacturing Complexity

25. Standalone Market Example: RAID Storage • The Application • Redundant array of inexpensive disks (RAID 0-7 & Hybrids) • RAID systems are found in imaging, video, audio, web sites, emerging multimedia programs, transaction processing systems, mission critical backup solutions for hospitals, police, banking and insurance firms have ever increasing needs for high transfer rates and storage capacity. Configuration Data • MRAM Improves Performance • Non volatile memory increases security & integrity of data • Failsafe RAID cache • High data availability without BBSRAM (Battery-Backed Static RAM) difficulties RAID Controller Chip RAID Controller RAID Journal Critical Cache DiskArrays

26. MR2A16ATS35C Application Spaces • Target Application Spaces • Data Streaming • RAID systems and servers • POS terminals • Data-acquisition systems • Data logging • Buffers • Routers / switches • Printers / copiers • System Configuration • Black-box applications • Gaming • System status • Currently not targeting high density, space-constrained applications • Portable digital audio players • Jump drives • Digital camera data storage

27. Embedded MRAM Example: System on a Chip

28. MRAM Compared to Flash

29. Sample and Production Timing • Current planning: • Now – 4Mb Qualification Samples. 0 – 70C, 35ns • Now – 4Mb Production. 0 – 70C, 35ns • 1Q07 – 4Mb Qualification Samples. -40C – 105C • 2Q07 – 4Mb Production Volumes. -40C – 105C • 2007 – Derivative Products (to be announced)

30. Summary • Industry’s first high performance, reliable non volatile memory technology. • 4Mb part is available now for applications like configuration storage, data logging, cache buffer, etc. • Industrial temperature part (-40C to 105C) will be available by mid-2007. • Various standalone parts will be available from Freescale. • Embedded designs are being defined.