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Learn about PIC18 microcontroller families, architecture, and assembly language programming. Discover the features, benefits, and differences between Harvard and Von Neumann architectures in this informative presentation by S. Himabindu. Explore RISC versus CISC design strategies and the operation of PIC18 microcontrollers.
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MICROCONTROLLER ARCHITECTURE & ASSEMBLY LANGUAGE PROGRAMMING Presented by S.HIMABINDU Department of ELETRONICS AND COMMUNICATIONS
Outline • PIC18 Microcontroller families • PIC18 architecture • Data RAM file Register
INTRODUCTION PIC is a family of modified Harvard architecture microcontrollers made by Microchip Technology, derived from the PIC1650 originally developed by General Instrument's Microelectronics Division. The name PIC initially referred to "Peripheral Interface Controller”
PICs are popular with both industrial developers and hobbyists alike due to their: • 1. low cost, • 2. wide availability, • 3.large user base, • 4.extensive collection of application notes, • 5.availability of low cost or free development tools, • 6.serial programming (and re-programming with flash memory) capability.
PIC18 Architecture • PIC microcontrollers are based on advanced RISC architecture. • RISC stands for Reduced Instruction Set Computing. In this architecture, the instruction set of hardware gets reduced which increases the execution rate (speed) of system. • • PIC microcontrollers follow Harvard architecture for internal data transfer
RISC vs CISC • Reduced instruction set computing, or RISCis a CPU design strategy based on the insight that simplified instructions can provide higher performance if this simplicity enables much faster execution of each instruction. • A complex instruction set computer (CISC), is a computer where single instructions can execute several low-level operations
ABOUT PIC18 • PIC microcontrollers are designed using the Harvard Architecture which includes: • Microprocessor unit (MPU) • Program memory for instructions • Data memory for data • I/O ports • Support devices such as timers
Harvard Architecture vs Von Neumann Architecture • Von Neumann Architecture: • –Used single memory space for program and data. • –Limits operating bandwidth • •Harvard Architecture: • –Uses two separate memory spaces for program instructions and data • –Improved operating bandwidth • –Allows for different bus widths • Von Neumann Architecture8-bit BusCPUProgram & Data MemoryCPUHarvardArchitectureDataMemoryProgram Memory8-bit Bus16-bit Bus
PIC18 Features: CPU core The function of the CPU is to execute (process) information stored in memory. Program ROM The ROM use to store program
EXAMPLE • Show the status of the C, DC and Z flag after the addition of 38H and 2FH. • Solution: • 38H 00111000 • + 2FH + 00101111 • 67H 01100111 • C = 0 • DC = 1 • Z = 0
References • Microchip.com • Wikipedia, the free encyclopedia • http://www.engineersgarage.com