1 / 19

VLSI Project

VLSI Project. Neural Networks based Branch Prediction. Alexander Zlotnik Marcel Apfelbaum Supervised by: Michael Behar, Spring 2005. taken. taken. taken. 11 ST. 00 SNT. 01 WNT. 10 WT. taken. not-taken. not-taken. not-taken. not-taken. Introduction.

Download Presentation

VLSI Project

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. VLSI Project Neural Networks based Branch Prediction Alexander Zlotnik Marcel Apfelbaum Supervised by: Michael Behar, Spring 2005

  2. taken taken taken 11 ST 00 SNT 01 WNT 10 WT taken not-taken not-taken not-taken not-taken Introduction • Branch Prediction has always been a “hot” topic 20% of all instructions are branches • Correct prediction makes faster execution Misprediction has high costs • Classic predictors are based on 2 bit counter state-machines VLSI Project Spring 2005

  3. Introduction (cont.) • Modern predictors are 2 level and use 2 bit counters and branch history (local\global) • Known problems are: • Memory size exponential to history length • Too long history can cause errors • Recent studies explore Branch Prediction using Neural Networks VLSI Project Spring 2005

  4. Project Objective • Develop a mechanism for branch prediction • Explore the practicability and applicability of such mechanism and explore its success rates • Use of a known Neural Networks technology: The Perceptron • Compare and analyze against “old” predictors VLSI Project Spring 2005

  5. Project Requirements • Develop for SimpleScalar platform to simulate OOOE processors • Run developed predictor on accepted benchmarks • C language • No hardware components equivalence needed, software implementation only VLSI Project Spring 2005

  6. Background and Theory Perceptron VLSI Project Spring 2005

  7. Background and Theory (cont.) Perceptron Training Let ө=training threshold t=1 if the branch was taken, or -1 otherwise x=history vector if (sign( yout) != t) or |yout|<= өthen for i := 0 to n do wi:= wi+ t*xi end for end if VLSI Project Spring 2005

  8. Development Stages • Studying the background • Learning SimpleScalar platform • Coding a "dummy" predictor and using it to be sure that we understand how branch prediction is handled in the SimpleScalar platform • Coding the perceptron predictor itself • Coding perceptron behavior revealer • Benchmarking (smart environment) • A special study of our suggestion regarding perceptron predictor performance VLSI Project Spring 2005

  9. Principles • Branch prediction needs a learning methodology, NN provides it based on inputs and outputs (patterns recognition) • As history grows, the data structures of our predictor grows linearly. • We use a perceptron to learn correlations between particular branch outcomes in the global history and the behavior of the current branch. These correlations are represented by the weights. The larger the weight, the stronger the correlation, and the more that particular branch in the history contributes to the prediction of the current branch. The input to the bias weight is always 1, so instead of learning a correlation with a previous branch outcome, the bias weight learns the bias of the branch, independent of the history. VLSI Project Spring 2005

  10. Design and Implementation VLSI Project Spring 2005

  11. Hardware budget • History length Long history length -> less perceptrons • Threshold The threshold is a parameter to the perceptron training algorithm that is used to decide whether the predictor needs more training. • Representation of weights Weights are signed integers. Nr of bits = 1 + floor(log(Θ)). VLSI Project Spring 2005

  12. Algorithm • Fetch stage 1. The branch address is hashed to produce an index i Є 0..n - 1into the table of perceptrons. 2. The i-th perceptron is fetched from the table into a vector register, of weights P. 3.The value of y is computed as the dot product of P and the global history register. 4.The branch is predicted not taken when y is negative, or taken otherwise. VLSI Project Spring 2005

  13. Algorithm (cont.) • Execution stage 1.Once the actual outcome of the branch becomes known, the training algorithm uses this outcome and the value of y to update the weights in P (training) 2. P is written back to the i-th entry in the table. VLSI Project Spring 2005

  14. Simulation Results In all parameters Perceptron based predictor outran the GSHARE Simulation done over Benchmarks of VPR, Perl, Parser from the ss_spec2k VLSI Project Spring 2005

  15. Simulation Results (cont.) VLSI Project Spring 2005

  16. Simulation Results (cont.) VLSI Project Spring 2005

  17. Simulation Results (cont.) VLSI Project Spring 2005

  18. Special Problems • Software simulation of hardware • Utilizing existing data structures of SimpleScalar • Compiling self written programs for SimpleScalar • After several weeks of hard work we decided to use accepted benchmarks VLSI Project Spring 2005

  19. Summary • We implemented a different branch prediction mechanism and received exciting results • Hardware implementation of the mechanism is hard, but possible • Longer history in perceptron helps getting better predictions VLSI Project Spring 2005

More Related