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PEM Qualification Requirements

PEM Qualification Requirements. For Radiation Hardened Non-Hermetic Products Qualifiable for Space Flight Applications. Plastic vs Hermetic. Moisture Effects Weight Differences Shock & Vibration Outgassing Effects Package Qualifications Board Qualifications Assembly Roadmap.

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PEM Qualification Requirements

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  1. PEM Qualification Requirements For Radiation Hardened Non-Hermetic Products Qualifiable for Space Flight Applications

  2. Plastic vs Hermetic • Moisture Effects • Weight Differences • Shock & Vibration • Outgassing Effects • Package Qualifications • Board Qualifications • Assembly Roadmap

  3. Moisture Effects • All Xilinx PEMs are certified according to method JESD20 as Level 3 or better • JESD20 certification includes three passes of solder simulation to allow for rework • “POPCORN” is a myth after successful board assembly • Space is actually a benign, dry environment for PEMs.

  4. “POPCORN” • “POPCORN” can only occur during the assembly process if industry standard rules are not followed • “POPCORN” is caused by liberation of the steam formed during the rapid thermal excursions to 230°C seen in the solder reflow process • “POPCORN” can only occur when adsorbed moisture is turned to steam faster than it can escape • “POPCORN” does not occur in operation because temperatures and temperature ramp rates in operation are simply not high enough

  5. PLCC84 28.4 °C/watt PQ240 12.3 °C/watt BGA432 10.7 °C/watt BGA560 10.2 °C/watt FG680 10.6 °C/watt FG900 13.5 °C/watt FG1156 13.4 °C/watt PG84 32.5 °C/watt PG175 21.9 °C/watt CB228 17.5 °C/watt CG560 14.3 °C/watt no higher pin count ceramic packages are currently available from Xilinx Thermal Comparisontheta Ja

  6. PLCC84 6.8gr PQ240 7.1gr BGA432 7.1gr BGA560 12.3gr FG680 10.6gr FG900 4.2gr FG1156 6.2gr PG84 7.5gr PG175 17.7gr CB228 17.6gr CG560 44.0gr no higher pin count ceramic packages are currently available from Xilinx Weight Comparisons

  7. Launch Cost Comparisonbased on $10,000/lb to GEO • CG560 $969.00 • BG560 $270.00 • FG900 $ 92.00

  8. Shock & Vibration • The lower weight (mass) of PEMs gives them a distinct advantage in passing board mount vibration tests • PEMs are solid encapsulation, so ultrasonic cleaning and shock cannot affect bond wire integrity • PEMs are qualified to all the shock, vibration and life tests utilizing the following standard test methods: • method 1010 T/C condition C • method 1011 T/S condition C • method 1005 Steady State Life • method 2004 Lead Integrity • method 2005 Vibration

  9. Shock & Vibration (continued) • PEMs offer the additional advantages of being manufactured on main stream, high volume commercial manufacturing lines with: • method 2011 bond strength, under SPC control with CpKs > 2.0, on QML certified lines • method 2019 die shear, under SPC control with CpKs > 2.0, on QML certified lines • method 2012 radiography, with die attach coverage and bond sweep under SPC control, on QML certified lines

  10. Outgassing Effects • Data Source: NASA Web Sites • Key Parameters • TML (total material loss) • CVCM (condensable volatiles recovered) • NASA Specifications • A TML < 1.0% CVCM < 0.1% • B TML < 3.0% CVCM < 1.0% • X TML > 3.0% CVCM > 1.0%

  11. Packaging Materials • Injection Molded Packages • PLCC: Nitto MP 8000 • PQFP: Nitto MP8000, Sumitomo 7304 • PDIP/SO: Sumitomo 6300 • Ball Grid Packages • SBGA: Hysol FP4450, BT Laminate • BGA: Plaskon SMBT-1, BT Laminate

  12. Outgas DataInjection Molded Packages • PQFP, PDIP, SO, BGA • Sumitomo 6300 (PDIP, SO, PLCC) • TML 0.27% • CVCM 0.00% • Sumitomo 7304 (PQFP, TQ/VQ) • TML 0.17% • CVCM 0.00% • Nitto 8100 (PQFP, PLCC) • TML 0.20% • CVCM 0.01% • BT Laminate (BGA substrate) • TML 0.78% • CVCM 0.01% • Plaskon SMTB-1 (BGA mold compound) • TML 0.28% • CVCM 0.00%

  13. Outgas DataEncapsulated Packages • SBGA • BT Laminate (SBGA substrate) • TML 0.78% • CVCM 0.01% • Hysol FP4450 (SBGA encapsulate) • TML 0.13% • CVCM 0.00%

  14. Circuit Board Outgasfor comparison • FR-4 (various formulations) • TML 0.22 - 0.41% (range) • CVCM 0.00 - 0.01% (range) • Polyimide Laminate • TML 0.78% • CVCM 0.01% • Conclusion: The PC board materials have considerably more outgassing potential than the various materials used to fabricate PEMs.

  15. ISO9000 Conformance DSCC QML Certification PURE Approval Open Data Communications Reliability Monitoring Programs SPC Data Availability Applications Support SPC Control Programs TL9000 Certification Subcontractor Control Programs PCN Process Mask Revision Control Hardness Assurance Data SEU Upset Data Possible Indicators of Quality Manufacturing

  16. Typical Wafer Fab SPC Report

  17. Parametric SPC Report

  18. Metal Step Coverage of CMP Process

  19. Metal Step Coverage of Reflow Process

  20. Bond Integrity and Sweep

  21. One device was pulled for wire bond pull test. Minimum = 8.3 Maximum = 13.6 Average = 10.1 Std. Dev. = 1.2 MODE : 1 = Break at Neck Bond Pull Data on Completed Assemblies

  22. Plastic Qualification Tests • Temperature Cycling (T/C) • Moisture Resistance (PCT) • Humidity Temperature Bias (85/85) • Highly Accelerated Stress Test (HAST)

  23. Temperature Cycling (T/C) • Performed to 883 Method 1010 • Moisture Pre-stress to Level 3 • Full Solder Simulation per JESD20 • Condition C (-65°C/+150°C) for Injection Molded Packages (PQFP) • Condition B for Ball Grid Packages • Full Production Testing at end of Stress • Package Decapsulation at End of Test to check for Die Cracking

  24. Results of Temp Cycle Testing

  25. Pressure Pot Testing • Performed in 121°C Steam at 2 atm • Moisture Pre-stress to Level 3 • Full Solder Simulation per JESD20 • Minimum of 96 Hours • Full Production Testing at end of Stress • Package Decapsulation at End of Test to Examine for Corrosion

  26. Moisture Resistance Testing

  27. Temperature Humidity Bias • Performed to 85°C, 85%RH, Nominal Vcc • Moisture Pre-stress to Level 3 • Full Solder Simulation per JESD20 • Minimum of 1,000 hours • Full Production Testing at end of Stress • Package Decapsulation at End of Test to check for Corrosion

  28. Temperature Humidity Bias

  29. Highly Accelerated Stress Test • Performed at 130°C, 85%RH, 2atm, Vcc • Moisture Pre-stress to Level 3 • Full Solder Simulation per JESD20 • Minimum of 100 hours • Full Production Testing at end of Stress • Package Decapsulation at End of Test to check for Corrosion

  30. Highly Accelerated Stress Test

  31. Board Level Reliability Test FG676, FG680, FG860, & FG1156

  32. 1st Test Cycles Mean Life Package # Tested # Failed Failure Condition Completed (cycles) (cycles) FG676 TC1 2112 32 27 1341 1830 FG676 TC2 2126 32 26 1434 1788 FG676 TC3 7029 32 4 5909* N/A FG680 TC1 5222 29 20 4219 4796 FG680 TC2 3960 32 16 2883 3891 FG680 TC3 6790 32 0 N/A N/A FG860 TC3 5044 32 0 N/A N/A FG1156 TC1 3108 32 30 1601 2386 FG1156 TC2 2507 48 32 1666 2256 FG1156 TC3 5044 32 0 N/A N/A * First failure Summary of Test Results t All Packages Passed at least 1000 cycles of TC1 & TC2 Conditions t TC2 is more Damaging than TC1 for FG680 (Heat Slug Package), No t Significant Difference for FG676 & FG1156 (PBGA Type Packages)

  33. Pad Pad Package Size I/O Pitch Ball Size Die Size Substrate Opening Type FG676 (PBGA) 27x27 676 1.0 0.6 0.48 SMD 17.8x17.8x0.3 0.56 Thk, 4 Layer All Dimensions in mm 1st Test Cycles Mean Life Package # Tested # Failed Failure Condition Completed (cycles) (cycles) FG676 TC1 2112 32 27 1341 1830 FG676 TC2 2126 32 26 1434 1788 FG676 TC3 7029 32 4 5909* N/A FG676 99.0 Weibull TC1 50.0 TC2 Cumulative % Failed 10.0 5.0 1.0 500.0 5000.0 Cycles to Failure b1=9.3, h1=1896.5, r=1.0 b2=12.6, h2=1852.2, r=1.0 2nd Level Reliability Test - FG676 (PBGA) Package t Motherboard t – 1.6mm Thick – 0.38mm Pad NSMD Test Data t – Failures Primarily Around Die Edge – No Significant Difference Between TC1 and TC2 Results

  34. Pad Pad Package Size I/O Pitch Ball Size Die Size Substrate Opening Type FG680 (SBGA) 40x40 680 1.0 0.6 0.48 SMD 20.3x20.3x0.3 0.98 Thk, 3 Layer All Dimensions in mm 1st Test Cycles Mean Life Package # Tested # Failed Failure Condition Completed (cycles) (cycles) FG680 TC1 5222 29** 20 4219 4796 FG680 TC2 3960 32 16 2883 3891 FG680 TC3 6790 32 0 N/A N/A FG680 99.0 Weibull TC1 50.0 TC2 Cumulative % Failed 10.0 5.0 1.0 1000.0 10000.0 Cycles to Failure b1=22.6, h1=4913.2, r=1.0 b2=9.9, h2=4092.2, r=1.0 2nd Level Reliability Test - FG680 (SBGA) Package t Motherboard t – 1.6mm Thick – 0.38mm Pad NSMD Test Data t – TC2 is 1.25X More Damaging

  35. Pad Pad Package Size I/O Pitch Ball Size Die Size Substrate Opening Type FG1156 (PBGA) 35x35 1156 1.0 0.6 0.48 SMD 23.11x21.13x0.3 0.56 Thk, 4 Layer All Dimensions in mm 1st Test Cycles Mean Life Package # Tested # Failed Failure Condition Completed (cycles) (cycles) FG1156 TC1 3108 32 30 1601 2386 FG1156 TC2 2507 48 32 1666 2256 FG1156 TC3 5044 32 0 N/A N/A FG1156 99.0 Weibull TC1 -Die Region 50.0 TC1 -Perimeter Cumulative % Failed 10.0 TC2 -Die Region 5.0 1.0 1000.0 10000.0 Cycles to Failure b1=8.9, h1=2521.7, r=1.0 b2=4.3, h2=4268.4, r=0.9 b3=19.4, h3=2319.6, r=0.9 2nd Level Reliability Test - FG1156 (PBGA) Package t Motherboard t – 1.6mm Thick – 0.38mm Pad NSMD Test Data t – 2 Separate Nets/Device Inside the Die t Outside the Die t – Nets Inside the Die Failed First Failures Primarily t Underneath the Die – No Significant Difference Between TC1 and TC2 Results

  36. SOIC 1.27 - 0.5 mm PQFP 0.8 - 0.5 mm PLCC 1.27 mm Packaging Industry Evolution XILINX 1999-2000 • High Performance • High Pincounts / I/Os • Product Miniaturization • Portables CSP 0.8 - 0.5 mm FBGA 1.0 mm BGA 1.27mm AREA ARRAY SMT Packages 1991  Millennium Size and Performance Limitations PERIMETER SMT Packages 1980 - 1990 DIPs 2.54 mm Pitch THRU-HOLE Packages 1960’s

  37. Advanced Package and Technology RoadmapY1997-Y2002 Package Size 45 x 45 45 x 45 45 x 45 42.5 x 42.5 42.5 x 42.5 42.5 x 42.5 28 x 25 28 x 25 Max Die Size 24 x 22 23 x 21 Pincount Range 19 x 21 19 x 21 Flip Chip Wirebond 40 30 20 Power (Watts) 10 10 10

  38. Xilinx BGA Packaging Strategy Flip Chip BGA > 900 - 1500 pins Virtex Spartan CPLD “SBGA” Cu-Based BGA 352-860 pins 1.38 mm 1.0-1.27mm “FinePitch BGA” Plastic Molded BGA 256-1156 pins 1.0mm • High Power / Thermal Dissipation • High Density / IOs • High Performance / Frequency Design • Feature Crammed, High Speed Switching Systems “CSP” Flex-Based BGA 48-280 pins 0.8-0.5mm • Highest Power / Thermal Dissipation • Highest Density / IOs • High Performance Interconnect Enabler • Feature Crammed, High Speed Switching Systems • Advanced High-End Products • Mid-Range / Mainstream • General Functions • Off-the-Shelf • User Friendly • Cost Effective • Miniaturization, Light Weight • Wireless Communication • Height Restriction • PCMCIA, Portables • Low Cost and High Volume

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