1 / 253

嵌入式 LINUX 系统培训

嵌入式 LINUX 系统培训. 李超 Email ： lichao-runing@163.com Phone:13913004799. 第二大部分. S3C2410 微处理器暨接口. PART I S3C2410 处理器. － overview. S3C2410 处理器性质－ architecture. Integrated system for hand-held devices and general embedded applications

nyx
Download Presentation

嵌入式 LINUX 系统培训

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. 嵌入式LINUX系统培训 李超 Email：lichao-runing@163.com Phone:13913004799

  2. 第二大部分 S3C2410微处理器暨接口

  3. PART I S3C2410处理器 －overview

  4. S3C2410处理器性质－architecture • Integrated system for hand-held devices and general embedded applications • 16/32-Bit RISC architecture and powerfull instruction set with ARM920T CPU core • Enhanced ARM architecture MMU to support WinCE, EPOC 32 and Linux • Instruction cache, data cache, write buffer and Physical address TAG RAM to reduce the effect of main memory bandwidth and latency on performance • ARM920T CPU core supports the ARM debug architecture. • Internal Advanced Microcontroller Bus Architecture (AMBA) (AMBA2.0, AHB/APB

  5. S3C2410处理器性质－System Manager • Little/Big Endian support • Address space: 128M bytes for each bank (total1G bytes) • Supports programmable 8/16/32-bit data bus width for each bank • Fixed bank start address from bank 0 to bank 6 • Programmable bank start address and bank size for bank 7 • Eight memory banks: – Six memory banks for ROM, SRAM, and others. – Two memory banks for ROM/SRAM/ Synchronous DRAM • Supports various types of ROM for booting • (NOR/NAND Flash, EEPROM, and others)

  6. S3C2410处理器性质 －NAND Flash Boot Loader • Supports booting from NAND flash memory • 4KB internal buffer for booting • Supports storage memory for NAND flash memory after booting

  7. S3C2410处理器性质 －Cache Memory • 64-way set-associative cache with I-Cache (16KB) and D-Cache (16KB) • 8words length per line with one valid bit and two dirty bits per line • Pseudo random or round robin replacement algorithm • Write-through or write-back cache operation toupdate the main memory • The write buffer can hold 16 words of data and four addresses.

  8. S3C2410处理器性质 －Clock & Power Manage • The clock & power management block consists of three parts: clock control, USB control, and power control. • Clock can be fed selectively to each function block by software. • Power mode: Normal, Slow, Idle, and Power-off mode； • Normal mode: Normal operating mode； • Slow mode: Low frequency clock without PLL； • Idle mode: The clock for only CPU is stopped.； • Power-off mode: The Core power including all peripherals is shut down. • Woken up by EINT[15:0] or RTC alarm interrupt from Power-Off mode

  9. S3C2410处理器性质 －Interrupt Controller • 55 Interrupt sources － One Watch dog timer － 5 timers － 9 UARTs － 24 external interrupts － 4 DMA － 2 RTC － 2 ADC － 1 IIC － 2SPI － 1 SDI － 2 USB － 1 LCD － 1 Battery Fault • Level/Edge mode on external interrupt source • Programmable polarity of edge and level • Supports Fast Interrupt request (FIQ) for very • urgent interrupt request

  10. S3C2410处理器性质－Timer with Pulse Width Modulation (PWM) • 4-ch 16-bit Timer with PWM / 1-ch 16-bit internal timer with DMA-based or interrupt-based operation • Programmable duty cycle, frequency, and polarity • Dead-zone generation • Supports external clock sources

  11. S3C2410处理器性质－RTC (Real Time Clock) • Full clock feature: second, minute, hour, date,day, month, and year • 32.768 KHz operation • Alarm interrupt • Time tick interrupt

  12. S3C2410处理器性质－General Purpose Input/Output Ports • 24 external interrupt ports • multiplexed input/output ports

  13. S3C2410处理器性质－ UART • 3-channel UART with DMA-based or interruptbased operation • Supports 5-bit, 6-bit, 7-bit, or 8-bit serial data transmit/receive (Tx/Rx) • Supports external clocks for the UART operation (UEXTCLK) • Programmable baud rate • Supports IrDA 1.0 • Loopback mode for testing • Each channel has internal 16-byte Tx FIFO and 16-byte Rx FIFO.

  14. S3C2410处理器性质－ DMA Controller • 4-ch DMA controller • Supports memory to memory, IO to memory,memory to IO, and IO to IO transfers • Burst transfer mode to enhance the transfer rate

  15. S3C2410处理器性质－ A/D Converter & Touch Screen Interface • 8-ch multiplexed ADC • Max. 500KSPS and 10-bit Resolution

  16. S3C2410处理器性质－ LCD Controller STN LCD Displays Feature • Supports 3 types of STN LCD panels: 4-bit dual scan, 4-bit single scan, 8-bit single scan display type • Supports monochrome mode, 4 gray levels, 16 gray levels, 256 colors and 4096 colors for STN LCD • Supports multiple screen size • Typical actual screen size: • 640x480 • 320x240 • 160x160 • others • Maximum virtual screen size is 4 Mbytes. • Maximum virtual screen size in 256 color mode: 4096x1024, 2048x2048, 1024x4096,and others

  17. S3C2410处理器性质－ TFTColor Displays Feature • Supports 1, 2, 4 or 8 bpp (bit-per-pixel) palette color displays for color TFT • Supports 16 bpp non-palette true-color displays for color TFT • Supports maximum 16M color TFT at 24 bpp mode • Supports multiple screen size • Typical actual screen size: • 640x480 • 320x240 • 160x160 • others • Maximum virtual screen size is 4 Mbytes. • Maximum virtual screen size in 256 color mode: 2048x1024, and others

  18. S3C2410处理器性质－ Watchdog Timer • 16-bit Watchdog Timer • Interrupt request or system reset at time-out

  19. S3C2410处理器性质－ IIC-Bus Interface • 1-ch Multi-Master IIC-Bus • Serial, 8-bit oriented and bi-directional data transfers can be made at up to 100 Kbit/s in Standard mode or up to 400 Kbit/s in Fast mode.

  20. S3C2410处理器性质－ IIS-Bus Interface • 1-ch IIS-bus for audio interface with DMA-based operation • Serial, 8-/16-bit per channel data transfers • 128 Bytes (64-Byte + 64-Byte) FIFO for Tx/Rx • Supports IIS format and MSB-justified data format

  21. S3C2410处理器性质－ USB Host • 2-port USB Host • Complies with OHCI Rev. 1.0 • Compatible with USB Specification version 1.1

  22. S3C2410处理器性质－ USB Device • 1-port USB Device • 5 Endpoints for USB Device • Compatible with USB Specification version 1.1

  23. S3C2410处理器性质－ SD Host Interface • Compatible with SD Memory Card Protocol version 1.0 • Compatible with SDIO Card Protocol version 1.0 • Bytes FIFO for Tx/Rx • DMA based or Interrupt based operation • Compatible with Multimedia Card Protocol version 2.11

  24. S3C2410处理器性质－ Operating Frequency&package • Up to 266MHz • 272-FBGA

  25. S3C2410处理器性质－ Operating Voltage Range • Core: • 1.8V for 200MHz (S3C2410A-20) • 2.0V for 266MHz (S3C2410A-26) • Memory & IO: 3.3V

  26. S3C2410X内部结构图

  27. S3C2410X的引脚分布图

  28. PART II S3C2410处理器 －Signal Descriptions

  29. Bus controller

  30. SDRAM/SRAM

  31. NAND Flash

  32. LCD Control Unit

  33. Interrupt Control Unit

  34. DMA

  35. UART

  36. ADC

  37. IIC-Bus&IIS-Bus

  38. Touch Screen

  39. USB Host&USB Device

  40. SD&General Port &TIMMER

  41. JTAG TEST LOGIC

  42. Reset, Clock & Power

  43. PART III S3C2410处理器 －Registers

  44. S3c2410寄存器特点 • 数目众多 • 和内存统一编址 • 位于内存的0x48000000～0X60000000 • 物理地址下访问寄存器方式 （*(volatile *(0x48000000)))=0x55aa

  45. PART IV S3C2410处理器 －Watchdog

  46. 看门狗的功能 • 嵌入式系统运行时受到外部干扰或者系统错误，程序有时会出现"跑飞"，导致整个系统瘫痪。为了防止这一现象的发生，在对系统稳定性要求较高的场合往往要加入看门狗(WATCHDOG)电路。看门狗的作用就是当系统“跑飞”而进入死循环时，恢复系统的运行。

  47. 看门狗的工作原理 • 其基本原理为：设本系统程序完整运行一周期的时间是Tp，看门狗的定时周期为Ti，Ti>Tp，在程序运行一周期后就修改定时器的计数值，只要程序正常运行，定时器就不会溢出，若由于干扰等原因使系统不能在Tp时刻修改定时器的计数值，定时器将在Ti时刻溢出，引发系统复位，使系统得以重新运行，从而起到监控作用。 • 在一个完整的嵌入式系统或单片机小系统中通常都有看门狗定时器，且一般集成在处理器芯片中，看门狗实际上就是一个定时器，只是它在期满后将自动引起系统复位。

  48. S3C2410的看门狗控制器 • 输入时钟为MCLK（该时钟频率等于系统的主频），它经过两级分频，最后将分频后的时钟作为该定时器的输入时钟，当计数器期满后可以产生中断或者复位信号。 • S3C2410的看门狗定时器有两个功能 • 作为常规定时器使用，并且可以产生中断 • 作为看门狗定时器使用，期满时，它可以产生128个时钟周期的复位信号

  49. 看门狗定时器计数值 • 输入到计数器的时钟周期 t_watchdog = 1/( MCLK / (Prescaler value + 1) / Division_factor ) • 看门狗的定时周期 T = WTCNT * t_watchdog

  50. 看门狗定时器寄存器 • 控制寄存器（WTCON） • 数据寄存器（WTDAT） • 计数器寄存器（WTCNT）

More Related