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BIST AND DATA COMPRESSION. JTAG COURSE spring 2006 Andrei Otcheretianski. Contents:. BIST overview What is data compression? Data compression techniques Ones-count Transition-count Parity check Syndrome LFSR. Intro to BIST. Built-In-Self-Test
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BIST AND DATA COMPRESSION JTAG COURSE spring 2006 Andrei Otcheretianski BIST AND DATA COMPRESSION
Contents: • BIST overview • What is data compression? • Data compression techniques • Ones-count • Transition-count • Parity check • Syndrome • LFSR BIST AND DATA COMPRESSION
Intro to BIST • Built-In-Self-Test • BIST is a capability of a circuit to test itself • On-chip circuitry is used to apply a predetermined set of vectors to the CUT or DUT (circuit/device under test) • Another on-chip circuit monitors the results of the test and checks them against the stored correct response. BIST AND DATA COMPRESSION
Generalized BIST architecture Output Response R’ Input test Sequence T CUT Signature S(R’) Test pattern generator Data compression unit Comparator Pass/Fail Indicator BIST controller Correct signature S(R) BIST AND DATA COMPRESSION
Data Compression • The compression of large quantity of test response data into a compact set of fault signatures • Consider a 64 bit circuit, 10000 test vectors, 16 bit signature • 264000 sequences mapped to 216 signatures • 264000/ 216 sequences produce the same signature on the average (aliases) BIST AND DATA COMPRESSION
Compression techniques: ONES-COUNT • Assume single output circuit and output sequence R = r1, r2 … rm for m input vectors • ONES-COUNT: count the total number of 1s in R BIST AND DATA COMPRESSION
ONES-COUNT (cont.) • Aliasing (Error Masking): 11110000 00000000 = R2 s-a-0 11001100 11000000 = R1 10000000 = R0 10101010 s-a-1 BIST AND DATA COMPRESSION
Compression techniques: TRANSITION-COUNT • Signature is the number of 0-to-1 and 1-to-0 transitions in the output data stream 00000000 = R2 11000000 = R1 10000000 = R0 N D D Q counter D TC(R0) = 1 TC(R1) = 1 (undetected) TC(R2) = 0 clock BIST AND DATA COMPRESSION
TRANSITION-COUNT (cont.) • The formula: • Masking Probability: BIST AND DATA COMPRESSION
Compression TechniquesPARITY CHECK • Signature is the parity of circuit response: 0 if oven and 1 if odd. • Masking Probability: Detects all faults with an odd number of error bits in the response. 00000000 = R2 11000000 = R1 10000000 = R0 N D D Q p(R0) = 1 p(R1) = 0 p(R2) = 0 D clock BIST AND DATA COMPRESSION
Syndrome Testing • Relies on exhaustive testing i.e. applying all 2n vectors to an n input combinational circuit. • Assume single output circuit. Syndrome is the normalized number of 1’s in the result. • S = K / 2n where K is total number of 1’s • For example: Syndrome of AND gate is 1/8 and of OR gate is 7/8. • Theorem: Any function F can be realized in such way that all single stuck-at faults will be syndrome detectable. BIST AND DATA COMPRESSION
Computing Syndromes • For large n we should compute syndromes recursively. • Assume X and Y are disjoint. Syndrome S3 depends on C gate type. • Proof: IF C = OR gate then K = K12n2 + K22n1 – K1K2 S = K / 2n = S1+S2-S1S2 S1 X C1 S3 C Y S2 C2 BIST AND DATA COMPRESSION
LFSR • Linear Feedback Shift Register • Shift register that feed back bits through XOR functions. • Used both for Pseudo-Random Binary Sequence (PRBS) generation and for signature generation. • By correctly choosing the points at which we take the feedback from an n -bit shift register, we can produce a PRBS of length 2n – 1. This 3-bit LFSR produces A repeating string of 7 pseudo-random binary numbers BIST AND DATA COMPRESSION
Signature Analysis • LFSR can be simply transformed into SISR (Serial-Input Signature Register) by adding an additional XOR gate • This will perform data compression on the input sequence • At the end of the sequence SISR will form a signature • If the input sequence and SISR are long enough it is unlikely that two different sequences will produce the same signature. 3-bit SISR using LFSR BIST AND DATA COMPRESSION
LFSR: Masking Probability • Let LFSR be of length n and bit stream of length m • It can be shown that LFSR distributes ALL possible input streams equally over all signatures. • Streams with the same signature: 2m / 2n • Therefore: Masking Probability = 2m-n / 2m = 2-n • If all error streams are equally likely (ideal case) • Depends only on register length! BIST AND DATA COMPRESSION
MISR • SISR can only be used to test logic with a single output • Solution: Multiple-Input Signature Register • If we have n-bit long register we can accommodate up to n inputs to form the signature BIST AND DATA COMPRESSION
THE END Thank you for listening… BIST AND DATA COMPRESSION