The ESA MUSIC Project Multi-User & Interference Cancellation - ESA/ESTEC Contract 13095/98/NL/SB

1. The ESA MUSIC ProjectMulti-User & Interference Cancellation- ESA/ESTEC Contract 13095/98/NL/SB Advanced Mobile Satellite Systems & Technologies presentation days ESA./ESTEC – 14-15 November 2000

2. The MUSIC Project: Mission The MUSIC experiment (Multi-USer Interference Cancellation receiver) is a research project supported by the European Space Agency which is aimed at the validation of an Adaptive Interference Mitigating Detector suited for use in a CDMA-based mobile satellite network

3. The MUSIC Project: Mission The MUSIC experiment (Multi-USer Interference Cancellation receiver) is a research project supported by the European Space Agency which is aimed at the validation of an Adaptive Interference Mitigating Detector suited for use in a CDMA-based mobile satellite network

4. GPIB Serial Port PC Slot AWG National Instr. PCI 5411 NoiseCom UFX 7107 MUSIC Receiver Oscilloscope STM Proteo Board + STM/CPR EC-BAID ASIC Noise Generator Spectrum Analyzer HP E4411B MUSIC Breadboard Setup

5. Presentation Outline • Overall System Description and Architectural Issues(M. Luise, CPR) • Design of DSP HW and Analog TX/RX ends(G. Colleoni, STM) • Breadboard HW partitioning and ASIC Design(L. Fanucci, CPR)

6. Technical Specs Tables: MUSIC TX 1/2

7. Technical Specs Tables: MUSIC TX 2/2 As output from WP200

8. Technical Specs Tables: MUSIC RX 1/2

9. Technical Specs Tables: MUSIC RX 2/2 < < As output from WP200

10. GPIB Serial Port DAQ Board AWG MUSIC Receiver Oscilloscope Noise Generator Spectrum Analyzer Breadboard Control and Monitoring via LabVIEW

11. GPIB Serial Port DAQ Board AWG MUSIC Receiver Oscilloscope Noise Generator Spectrum Analyzer Breadboard Control and Monitoring via LabVIEW

12. A Corner of the MUSIC Lab in Pisa

13. The MUSIC TX: SW Setup …

14. The MUSIC TX: SW Setup …

15. AWG PC Slot … SW CDMA Signal Generation ...

16. … AWG Loading and Run PC Slot AWG

17. Sat Channel Emulation: Noise Generation MUSIC Testing Overall Set-up LabView Virtual Instrument NOISECOM UFX 7107

18. The MUSIC TX/RX: Analog IF front-end More in the presentation to follow… by G. Colleoni, STMicroelectronics

19. MUSIC RX:Direct IF sampling Spectrum after A/D conversion Digital downconversion to baseband

20. The PROTEO Signal Processing Board

21. The PROTEO Signal Processing Board

22. In-Phase P Interface Front-End CIC Decimation n =4 n =2 s s BER SNIR Prompt-I R c f r f f =4R 2R f s d d c c s 2 N-stage BER N-stage Compensation SNIR Interp. R Comb E/L-I Measurem. Integrator Filter / CMF c Estimation R s Symbol Demux-I Start f s f s Code I epoch I/Q Soft f =4.464 MHz Data IF Input IFd L R s DCO EC-BAID ADC CCAU ˆ Unit Q Symb. Clock f =70 MHz Int. Clock 8R Quadrature IF c Front-End CIC Decimation n n =4 s f s s Signal Detect / R c Prompt-Q Demod. Enable r f f f =4R 2R f s d d c s 2 N-stage N-stage Compensation R Interp. c E/L-Q Integrator Comb Filter / CMF R Demux-Q c R s Sync I/Q CCTU AGC Correlator E/L AFC Loop FED Filter Pilot Channel Code Traffic Channel Code D f MUSIC RX Architecture More on HW partitioning to follow… by L. Fanucci, CPR-Team

23. The Digital Multi-Rate Front-End 1/2 Downconverting to Baseband via a DCO fIFD BB

24. The Digital Multi-Rate Front-End 2/2 Cascaded Integrator-Comb (CIC) Filter A low-complexity solution to perform low-pass filtering and decimation with no noise spectrum aliasing

25. Ancillary Receiver Functions SYNCHRONIZATION Timing • Spreading code acquisition • Chip clock tracking Carrier • Carrier frequency tracking • Carrier phase recovery DETECTION • Signal Interpolation • Signal sense MONITORING AND MEASUREMENT • Signal-to-noise plus interference ratio • Bit error rate • Chip Timing & Carrier Loop Lock

26. Code Timing Acquisition Unit (CTAU) Correlation Time: L symbol intervals

27. Performance of CTAU with Different Kind of Pilots

28. Linear Interpolation Unit (LIU) Td= Tc/4 lm=integer delay, mm=fractional delay

29. Chip Clock Tracking Unit (CCTU)

30. Chip-timing Error Detector (CED) Non-coherent, non decision-aided processing – Lock detector not shown

31. Automatic Frequency Control Unit (AFCU) Frequency Error Detector (FED)

32. Carrier Phase Recovery Unit (CPRU)(embedded with EC-BAID) Decision-Aided at EC-BAID output !

33. The MUSIC core: The EC-BAID 1/2 E EC-BAID: Extended Complex-valued Blind Adaptive Interference-mitigating Detector is a baseband single-channel digital detector to counteract multiple-access interference F. Giannetti. R. De Gaudenzi, M. Luise: "Design of a Low-Complexity Adaptive Interference-Rejection Detector for DS/SS Receivers in CDMA Radio Networks", IEEE Trans. Commun, vol. COM-46 n. 1, Jan 1998.

34. Canonical Decomposition Symbol-Rate Detector Output , h = c + x 1 1 1 Recursive Adaptation Rule The MUSIC core: The EC-BAID 2/2 The C-BAID is a linear adaptive detector with complex-valued coefficients h1(m) ,m=0,1,...,L-1 CMF outputsarray

35. Features of the EC-BAID • Blind: no need for training sequences to aid algorithm convergence, nor knowledge of interferers' parameters • Robust to asynchronous MAI even for large interferer-to-useful channel power ratios • Insensitive to the unknown phase of the useful signal and compatible with conventional QPSK phase estimators • Robust to residual carrier frequency errors with respect toconventional DA-MMSE • Insensitiveto carrier frequency offsets on the interfering signals • Suited to low-power ASIC implementation on a low-cost user terminal. J. Romero-Garcia, F. Giannetti. R. De Gaudenzi, M. Luise: “A Frequency Error Resistant Blind CDMA Detector",IEEE Trans. Commun., July 2000

36. Interference-Mitigation Capability of EC-BAID Spreading FactorL=64 WH+E-PN Codes 1 User + 18 Interferers6 dB STRONGER than the useful channel each. (C/I)sc=-6 dB

37. The EC-BAID ASIC with Embedded CPRU 1/2

38. STM & TEAM EC-BAID The EC-BAID ASIC with Embedded CPRU 2/2 0.25 mm Technology More on ASIC Design to follow… by L. Fanucci, CPR-Team R. De Gaudenzi, E. Letta, L. Fanucci, F. Giannetti, M. Luise: "VLSI Implementation of a CDMA Blind Interference-Mitigating Detector", to appear on the IEEE Jou. Sel. Areas Commun

39. Some Results: Bit-True Simulations 1/2

40. Some Results: Bit-True Simulations 2/2

41. 70—MHz IF CDMA Signal + Noise Chip Rate= 2.048 Mchip/s L=64, Bit-rate=64 kb/s Data+Pilot Channel

42. BB Filtered/Interpolated Digital CDMA Signal

43. The Double-PROTEO Config with EC-BAID on FPGA

44. Current Status and Further Development Steps • EC-BAID FPGA Implementation finalized • ASIC layout finalized • Final Receiver BER Testing Started • ASIC foundry run scheduled • ASIC Integration and Testing planned Soon to be ended...

45. CIC Equalization

46. Signal Decimation with the CIC Filter 1/2 r=decimation factor

47. Signal Decimation with the CIC Filter 2/2 That’s How the CIC Works

48. AWG Aperture Equalizer

49. TX/RX Filtering IF Filter Mixer fIF fIFD AWG Signal+MAI fLO To: Noise Generation & Combining … more in the detailed presentation Local Oscillator

50. HW Partitioning of RX Functions