Manufacturing Processes

1. Manufacturing Processes • Printed Circuit Board Assembly (PCB): Must specify or account for all components mounted into, onto or attached in some way to a printed circuit board as well as test for same • Electrical Components: Passives, IC’s, Optical, ElecMech, ElecMag, Connectors, Switches, Sensors, Protection Devices, etc • Mechanical Components: Heat Sinks, Thermal Grease, Pullers, Stiffeners, Mounting Hardware, Sensors, Protection Devices, etc • High Level Assembly (HLA): Must specify or account for all elements or parts of an assembly level including testing • Electrical Elements: PCB’s, Cables, Harnesses, Fans, Power Supplies, Sensors, Protection Devices, User Displays, Switches, etc • Mechanical Elements: Enclosures, Feet, Standoffs, Card Guides, Gaskets, Sealants, Fasteners, Hardware, etc

2. Printed Circuit Board Assemblies • Printed Circuit Boards (PCBs): • Convenient form of interconnecting electrical components using industry standard attachment processes • 3 Basic Types of PCB-Component Assembly Technology • Thru Hole (TH) • Surface Mount (SMT) • Micro-electronic Multi-Chip-Module (MCM) • 3 Basic Types of PCB substrate systems (fabs) • Rigid epoxy including FR4, BT and others • Ceramic, Alumina (Al203), AlNi or other exotics • Flexible Substrate (flex circuit) • Single, Double and Multi-Layered

3. PCB Manufacturing Guide Links • fullnet.com/u/tomg/gooteepc.htm • ee.washington.edu/circuit_archive/text/design.html • precisioncircuits.com.au/cid/hm_cid.html • amscourseware.com/guidelines.htm • filtranmicro.com/design.html • goldengategraphics.com/pcgloss.htm • elchempub.com/files/electroc2.htm • pcbprotech.com/Dh3/DH3right.htm • pcbprototyping.com/html/html_edu.htm

4. Plated VIAs

5. Basic Photo-Etch PCB Mfg Process Plated Through Hole PCB Cross Section

6. VIA Aspect Ratio – Very Important Bd Thickness VIA Diameter Aspect Ratio = Aspect Ratios > 5 May Challenge Drilling, Plating & other PCB Mfg Processes Cross Section Example of Failed VIA due to poor drilling, plating

7. Cu PCB Trace Width & Depth IPC Current Capacity Limitations

8. Cu PCB Trace Conductor IPC* Spacing vs Voltage Summary (*Simplified)

9. Signal Routing is Important! The PCB is part of the circuit Good Signal Routing Equal Lengths, Uniform Good Power Bus Routing Bypass Caps Closest to IC Power Pins Poor Power Routing Bypass Caps and 1 Conductor too Lengthy Poor Signal Routing Un-Equal Lengths, Non-uniform

10. PCB Ionic Cleanliness is Important • Acetate & Formate - These organic acids can be extracted from some solder masks.  High levels can be indicative of an incompletely cured solder mask.  Incomplete cure can allow exposure of the copper traces to the environment resulting in corrosion and board failure. • Bromide:  Brominated compounds are added to laminates as a flame retardant.  Some laminates are employing alternate, non-bromine, flame retardants.  These are usually called specified as containing non-halogen flame retardants.  The surface bromide concentration is a function of the laminate heat history.  Bromide has also been identified as a component in some marking ink formulations and some solder masks. • Chloride - Chloride ions are the single most damaging material that can be on the board.  High levels are usually due to insufficient washing prior to applying the solder mask.  Chloride can also be transferred to the board by handling. • Nitrate and Ammonium - Both of these can be introduced in various plating processes. • Sulfate - Sulfate is rarely a problem.  High levels are usually caused by poor housekeeping:  dirty equipment, unpainted walls or unsealed floors.   • Sodium & Potassium - Sodium can be induced by handling but is also a component of tap water and may be indicative of poor water treatment.  In this case, chloride, calcium and magnesium should also be present.  • Calcium and Magnesium - Calcium and magnesium come from rinse water and are indicative of poor water quality.  • Citrate - Citrate salts and acids are components of some gold plating solutions.  They also are in many environmentally friendly cleaners. IPC-6012 mandates the total ionic cleanliness prior to solder mask be <10ug/in2 in NaCl equivelants (IPC-TM-650) Most Low Signal Or High Bias, High Reliability Designs Require Much Lower Levels on Individual Ions

11. TH: Thru-Hole Technology

12. Thru-Hole Device Packages • Passives and Discretes • Axial Leaded (2 terminal, lying down) • Resistors, Capacitors, Inductors, Diodes • Radial Leaded (2 terminal, standing up) • Capacitors, Inductors, LEDs, MOVs, Power Resistors, … • T0 – Series (2-N terminals, Most Accommodate Std Heat Sink hardware) • T0-92 Small Signal Transistors, Regulators, References • T0-220 Moderate Power (~1W) Transistors, Regulators, Amplifiers • T0-3 Higher Power (~3W) Transistors, Regulators, Amplifiers

13. Transistor Package Examples

14. Thru-Hole Device Packages • Integrated Circuits, Resistors, Relays • DIP (Dual In-Line Package) • PDIP, CDIP • SIP (Single In-Line Package) • Rectangular

15. P-DIP (plastic) and C-DIP (ceramic) Examples

16. SMT: Surface Mount Technology

17. SMT – Surface Mount Technology Generations 20mm DIP Small Outline Package Shrink SO Package Thin Shrink SOP Depopulated, Very Thin, Quad Flat Pack, No Leads 3 mm

18. Discretes: Rectangular (Example 0402)

19. SOT – Small Outline Transistors (SOT-3, SOT-223)

20. QFP – Quad Flat Packs

21. Quad Flat Pack – QFP, PQFP

22. PLCC – Plastic Leaded Chip Carriers

23. BGA – Ball Grid Arrays

24. Typical BGA Pin Layout

25. Electronic Assembly Quality

26. Electronic Assembly Quality and Standards

27. Component Procure Setup Substrate (Fab) Fabrication Fab, Comp Prep Bake, Clean Simplified Comparison of Thru Hole and SMT PCB Assembly Process Mechanical Hand Operations SMT Thru Hole Screen Solder Paste Auto Component Insertion Vision System Inspection Auto Component Placement Wave Solder Vision System Inspection Reflow Solder (Oven) Lead Trim Stresses and Test Processes Vision/Xray System Inspection

28. Setup Screen Print SMT Placement Reflow Hand Assembly Wave Solder Final Assembly Wash In Circuit Test Stress Screen Functional Test Pack / Ship Typical SMT Complex Circuit Board Assembly Processes

29. Solder Geometry Variability in SMT and THT

30. IPC = Institute of Printed Circuits, WWW.IPC.ORGAssociation Connecting Electronics Industries • IPC-A-610 Acceptability of Electronic Assemblies • IPC-6011 Series of Board PCB Performance Standards • IPC/EIA J-STD-001 Requirements for Soldered Electrical and Electronic Assemblies • IPC-7095 Design and Assembly Process Implementation for BGAs • IPC-2221 Generic Std for Printed Board Design • IPC-D-279 Design Guidelines for Reliable Surface Mount Technology Printed Board Assemblies Quality!

31. IPC Electronic Assembly Classifications • High Reliability Electronic Products: • Continued performance, performance on demand, and extended life is critical and equipment downtime cannot be tolerated. Equipment must function when required with a high level of reliability assurance. • End-use environment is harsh • Includes equipment for commercial, military products, and for such applications as life support or missile systems. • Dedicated Service Electronic Products: • Continued performance, extended life and uninterrupted service is desired but not critical. • Typically the end-use environment would not cause failures • Includes communications equipment, sophisticated business machines, instruments and military equipment • General Electronic Products: • Function of the completed assembly is the major requirement • Cosmetic imperfections are not important • Includes consumer, some computer, peripherals, general military HW Aerospace, Military 10 Yr Stresses # of Bds, # of solder joints # of Mechanical Cycles 4# of Power Cycles # of Therm Cycles, Excursion PROCESS CONTROL – PROCESS QUALITY Ref: IPC-A-610, IPC-JSTD-001, IPC-7095 Telecom & Certain Medical

32. 100 % 75 % 50 % 25 % 0 % 100 % 75 % 50 % 25 % 0 % IPC Workmanship Classes: Solder Volume, Shape, Placement Control • High Reliability Electronic Products: Includes the equipment for commercial and military products where continued performance or performance on demand is critical. Equipment downtime cannot be tolerated, and functionality is required for such applications as life support or missile systems. Printed board assemblies in this class are suitable for applications where high levels of assurance are required and service is essential. • Requirement for Aero-Space, Certain Military, Certain Medical • Dedicated Service Electronic Products: Includes communications equipment, sophisticated business machines, instruments and military equipment where high performance and extended life is required, and for which uninterrupted service is desired but is not critical. Typically the end-use environment would NOT cause failures. • Requirement for High Eng Telecom, COTS Military, Medical • General Electronic Products: Includes consumer products, some computer and peripherals, as well as general military hardware suitable for applications where cosmetic imperfections are not important and the major requirement is function of the completed printed board assembly. Min PTH Vertical Fill: Class 2 = 75% Class 3 = 100% Ref: IPC-A-610, IPC-JSTD-001

33. BGA Void Size and Locations,Uniform Void Position Distributions Sampling_Grid Position Model Solder_Joint_Radius Void_Distance Void_Radius S Void_Solder Interface Distance S = Shell Potential for Early Life Failure (ELFO) if S < D/10 = (solder_joint_radius)/10 S =Shell = solder_joint_radius – (void_distance + void_radius)

34. CLASS 1 Solder Joint_Radius: 0.225 mm Void_Radius: 0.135 mm Void_Area: 36% of Joint Area Failure criteria: D/10 P(D<10) = 81.11 % CLASS 2 Solder Joint_Radius: 0.225 mm Void_Radius: 0.1013 mm Void_Area: 20% of Joint Area Failure criteria: D/10 P(D<10) = 52.21 % CLASS 3 Solder Joint_Radius: 0.225 mm Void_Radius: 0.0675 mm Void_Area: 9% of Joint Area Failure criteria: D/10 P(D<10) = 27.00 %

35. Class vs Shell Size Relative Probabilities~ 2x more likely to exceed D/10 threshold with Class 2 vs Class 3 S = Shell Depth

36. Physics of Failure: Accumulated Fatigue Damage (AFD) is related to the number of stress cycles N, and mechanical stress, S, using Miner’s rule Exponent Bcomes from the S-N diagram. It is typically ~3 for 63/37 SnPb Solders Example: Solder Joint Shear Force voids Effective cross-sectional Area: D/2 Effective cross-sectional Area: D F Applied stress: Applied stress: Let  = 10, then AFD with voids will “age” about 1000x faster than AFD with no voids Voids in solder joints

37. IPC-A-610 Conditions • IPC-A-610 Workmanship Conditions • Target Condition- This is the most desired condition and previously was referred to as preferred. It is not always essential to achieve this condition for reliability considerations. • Acceptable Condition- is a condition that, while not at a Target Condition, will result in a reliable product for the application. Corrective actions shall be directed to move toward the Target Condition. • Nonconforming Process Indicator- Is when a condition exists which does not affect the use of the product, but is not optimum. May result in repair, rework or scrap depending upon the customer’s requirements. Corrective action is necessary to bring the result back toward the Target. • Nonconforming Defect Condition- is when a condition exists that does not meet the reliability or performance in the application. Correction action is mandatory. All the IPC-A-610 Measurements utilize • Temp (Deg F/C) • Mass (Oz/Kg) • Distance (mils/mm) There are three key words used in the workmanship standards: Must, Shall and Should. Must means mandatory for Class 1, 2, & 3 Shall means mandatory for Class 3 only. Should means recommended only for Class 1,2 & 3. Quality!

38. Solder Joints • Solder Joints: A solder joint is formed when two metal surfaces are soldered together. The solder fills the void between the surfaces and is the area most important. It provides the majority of “strength of attachment.” A solder fillet is formed after the solder joint is filled, and, is the visible solder verifying the presence of the solder joint. • Blow Hole Defects: Blowholes are solder voids visible from the surface going into the solder joint alongside a through-hole lead. A blowhole is a nonconforming process indicator provided the solder connection meets the minimum circumference and depth requirements. • Dewetting Defects: Solder joints are visually inspected for wetting characteristics. Dewetting occurs because the flux has been burned off and moisture attacks the surfaces. A good indicator of dewetting is solder pooling and pulling back off leads or lands. • Oxidation Defects: When moisture in the air attacks a solder joint, it forms a protective rust-like layer. This is referred to as oxidation, which attacks metal surfaces. Oxidation dramatically reduces the transfer efficiency of thermal energy. • Dimensional Defects: For any of the above in addition to poor placement, screening, reflow and other processes, solder joint geometric defect limits are clearly specified in these Stds (see above)

39. Discrete Component Geometries NOTES1. The maximum fillet may overhang the land or extend onto the top of the chip cap metallization; however the solder shall not extend further onto the component body.2. Properly wetted fillet evident.

40. J-Lead Component Geometries NOTES1. The maximum solder fillet shall not touch package body. 2. Properly wetted fillet evident.

41. Gull Wing Component Geometries NOTES1. Solder fillet may extend through the top bend. Solder must not touch the package body or end seal, except for low profile SMD devices, e.g., SOICs, SOTs. Solder should not extend under the body of low profile surface mount components whose leads are made of Alloy 42 or similar metals.2. Must not violate minimum design conductor spacing.3. Properly wetted fillet evident.

42. Thru-Hole Component Geometries NOTES1. Wetted solder refers to solder applied by the solder process.2. The 25% unfilled volume includes both source and destination side depressions.

43. Advanced Packaging

44. Surface Mount CSP / WLP (CSP = Chip Scale Package, WLP = Wafer Level Package) IC Packaging Progression: Through Hole TSOP • 25 mil pitch • Limited by perimeter leads CSP/WLP • Area array 0.8 mm to 0.5 mm • Limited by substrate wiring • 100 mil pitch • Limited by through hole spacing

45. Fujitsu SuperCSP Redistribution Trace (Cu) SiN Al Pad • Solder balls on copper posts • Redistribution wiring to posts • Encapsulant is molded onto wafer Polyimide Layer Die Encapsulant Barrier Metal Solder Ball Metal Post (Cu)

46. Wafer Level Packaging Will Become Std Density VOLUME • Chip Scale • CSP • Wafer Level • Stacked Die • SiP • Surface Mount • QFP • TSOP • SOJ • BGA • Thru Hole • DIP • Pin Grid 1960 1980 2000 YEAR

47. 10000 Flip-Chip Underfill+ µProcessor 0.25 mm grid HDI PWB 1000 0.5 mm grid ASICs DRAM Pins (#) 100 SRAM Flash Passives Analog ICs 10 Power ICs Discretes 1 1 10 100 1000 Die Area (mm2)

48. Process Flow:Wafer Level Packaging vs. Conventional Packaging * From Motorola