A Methodology for Architecture Exploration of heterogeneous Signal Processing Systems

1. A Methodology for Architecture Exploration of heterogeneous Signal Processing Systems Paul Lieverse, Pieter van der Wolf, Ed Deprettere, Kees Vissers

2. Outline • Problem definition • Related work • Basic principles • Methodology SPADE • Case study • Conclusion

3. Problem Definition • Modern signal processing systems have a heterogeneous architecture: programmable components to offer various functions and support different standards for transmission, dedicated hardware blocks for cost and power consideration. • New design Methodology SPADE for architecture exploration of heterogeneous signal processing systems Starts from a set of target applications Results in the definition of an architecture capable of executing the applications within predefined constraints

4. Problem Definition cont’d • The design has to start with abstract yet executable models. • Cost of model construction and model evaluation • Flexibility to explore alternative architectures

5. Related Work • Application modeling: Models of computation • Synchronous Dataflow(SDF), Dataflow Process Networks, Kahn Process Networks. • Architecture modeling and performance analysis at system level • Polis, reactive systems • Chinook, embedded systems • RASSP, DSP systems • Quantitative analysis of architectures, by A.C.J.Kienhuis, limited to a specific class of dataflow architectures • In contrast, SPADE distinguishes between application models and architecture models, and supports explicit mapping  reusability

6. Basic Principles • The Y-Chart: a general scheme for the design of programmable architectures

7. Basic Principles cont’d • Workload and Resources • Computation, communication workload • Processing, communication, memory resources, etc • Applications and architectures are modeled separately • Trace-Driven Simulation: performance analysis • Applications: network of concurrent communicating processes • Trace: workload

8. Application Modeling Objective: expose parallelism, make communication explicit Kahn Process Networks The execution is deterministic It fits nicely with signal processing applications It allows programmers to easily combine communication primitives with control constructs Application Programmers Interface (API) of SPADE Read function Write function Execution function, to handle symbolic instruction Trace entries are generated by them. SPADE

9. SPADE cont’d • Architecture Modeling • Easy to construct. No need to model the functional behavior • Library of Generic building blocks, which are parameterized • Trace driven execution unit (TDEU), which interprets trace entries • Interfaces, which connects the I/O ports of TDEU to communication resource • Generic bus block

10. SPADE cont’d • Mapping. • Each process is mapped onto a TDEU. Can be many-to-one, but not one-to-many • Each process port is mapped one-to-one onto an I/O port

11. SPADE cont’d • Simulation • Concurrently simulate the application model and the architecture model in a single memory space • Performance Metrics • The building blocks contain collectors for performance metrics. Data is collected during simulation.

12. Case Study: An MPEG-2 Decoder • Starts with the C-code of the MPEG-2 video decoder • Step 1: partition the sequential program into a parallel Kahn Process Network using API functions • Step 2: Collect statistics of the workload for different MPEG sequences, by running the application in stand-alone mode • Step 3: construct model for a realistic architecture, TM-2700 MPEG architecture, using the blocks from the library • Step 4: Define a mapping • Step 5: Perform simulation. Identify the bottlenecks.

13. Conclusion • SPADE supports efficient exploration of heterogeneous signal processing architectures that must satisfy the workload demands of multiple target applications • Kahn API functions can be used to structure applications • A broad class of architectures can be modeled with the generic architecture blocks from the library • Trace-driven simulation is used for co-simulation. Simulation speed, about 20,000 cycles per second for a relatively complex design. • A number of architectures and mappings can be explored