1 / 19

Intro to Deterministic Analysis

Learn about deterministic network calculus developed by Rene Cruz in the 1990s. Explore worst-case network performance scenarios, delay, backlog, and traffic analysis for packet switches with input and output buffers. Understand scheduling algorithms, buffer models, and traffic arrival modeling.

paulr
Download Presentation

Intro to Deterministic Analysis

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Intro to Deterministic Analysis left-continuous

  2. Deterministic network calculus: • Theory for obtain worst-case (=deterministic) network performance • Developed in the 1990s (Rene Cruz) • Bounds of interest: • Delay at a switch • Backlog at a switch • Traffic at output of switch

  3. Components of a Packet Switch

  4. Modeling a packet switch Model with input and output buffers

  5. Modeling a packet switch Model with input and output buffers Simplified model (only output buffers)

  6. A path of network switches

  7. Model of a switch Buffering takes place only at the output. (Neglect processing delay)

  8. Store and Forward: Packet arrives to buffer only after all bytes of the packet have been received An arrival to the buffer appears instantaneous Multiple packets can arrive at the same time Scheduling Algorithms: FIFO Priority Round-Robin Earliest-Deadline-First Packet arrivals

  9. Modeling Traffic Arrivals • We write arrivals as functions of time: A(t) : Arrivals until time t, measured in bits • There are a number of choices to be made: • Continuous time or Discrete time domain • Discrete sized or fluid flow traffic • Left-continuous or right-continuous

  10. Continuous time vs. Discrete time Domain • Continous time: t is a non-negative real number • Discrete time: Time is divided in clock ticks t = 0,1,2, ….

  11. Discrete-sized vs. Fluid flow • It is often simpler to view traffic as a fluid flow, that allows discrete sized bursts Traffic arrives in multiples of bits Traffic arrives like a fluid

  12. Left-continuous vs. right-continuous • With instantaneous (discrete-sized) arrivals in a continuous time domain, the arrival function A is a step function • There is a choice to draw the step function: ECE 1545

  13. Left-continuous vs. right-continuous right-continuous left-continuous • We will use a left-continuous arrival function A(t) considers arrivals in (0,t] A(t) considers arrivals in [0,t)(Note: A(0) = 0 !)

  14. Arrivals of packets to a buffered link • Backlog at the buffered link

  15. Arrival and departure functions

  16. Link rate of output is C Packet length is up to L bits long Assumptions: Scheduler is work-conserving (always transmitting when there is a backlog) Infinite Buffers slope C Backlog Backlog ECE 1545

  17. Definitions: ECE 1545

  18. Dealing with instantaneous arrivals • If we have an instantaneous arrival, then the arrival function is a step function. • Need to decide which time the arrival takes place. • We assume that the arrival occurs at time t+ • This leads to a left-continuous arrival function. ECE 1545

  19. ECE 1545

More Related