1 / 107

IP-based Design

IP-based Design. 12 October 2001 Sungjoo Yoo ISRC, Seoul Nat’l Univ. Outline. Design productivity gap and design reuse IP-based design Interface-based design Platform-based design Function-architecture co-design Practical issues in IP/Platform-based design Summary.

pisces
Download Presentation

IP-based Design

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. IP-based Design 12 October 2001 Sungjoo Yoo ISRC, Seoul Nat’l Univ.

  2. Outline • Design productivity gap and design reuse • IP-based design • Interface-based design • Platform-based design • Function-architecture co-design • Practical issues in IP/Platform-based design • Summary

  3. Design Productivity Gap

  4. How to Increase Design Productivity? • Reuse • What to reuse?  How to reuse? • IPs (Intellectual Properties)  IP-based design • Previous system design (or architecture), platform  platform-based design

  5. How to Increase Design Productivity? (2) Design at higher levels of abstraction • E.g. 200 lines/man-day • code size: C > assembly • Abstraction levels higher than C code level. • SPW, COSSAP, etc. • SDL, CORBA, etc. (3) Combine reuse and high-level design • Currently, function-architecture co-design

  6. Design Methodology Evolution

  7. IP-based Design • Basic strategy • SoC design by assembling IP cores.

  8. IP-based Design • Virtual Component (VC) = IP

  9. IP-based Design • VC Interface • VC Interface at RT level (VCI). • To reuse RTL IP’s • System-level interface (SLIF) • To reuse behavioral IP’s

  10. IP-based Design • VC integration with on-chip bus (OCB)

  11. IP-based Design • Bus wrapper

  12. IP-based Design • Example of VCI transactions

  13. IP-based Design • VCI Options

  14. IP-based Design w/ behavioral IP • System Level Interface (SLIF)

  15. IP-based Design • VC example

  16. IP-based Design • VC internal behavior

  17. IP-based Design • Layering of VC refinement

  18. IP-based Design

  19. IP-based Design

  20. IP-based Design • Integration of VC’s with OCB. • IP w/ VCI • VC w/ VCI + bus wrapper  OCB • Incremental refinement of VC interface • Behavioral IP • SLIF  OCB protocol w/ the behavior unchanged. • IP-based design • Formally, interface-based design

  21. Interface-based Design • Separation between behavior and communication

  22. Interface-based Design • Separation between behavior and communication • It enables IP reuse. • Each one can be refined separately. • Behavior refinement • Communication refinement • Design Automation Conf.’97 paper • James A. Rowson (Cadence) and Alberto Sangiovanni-Vincentelli (Berkeley).

  23. Communication in Interface-based Design sender receiver substitution master slave repartition

  24. Incremental Communication Refinement

  25. Checkpoint:IP-based Design • Separation between behavior and communication • It works in incremental communication refinement. • It includes SW IP’s as well as HW ones. • To be explained later in function-architecture co-design. • Bottom-up approach • SoC design by assembling IP cores.

  26. Evolution to Platform-based Design • A Problem of Bottom-Up IP Integration • How can the designer find the optimal system architecture? • Can we re-use our design experience at a higher level than IP level? • Reuse of previous designs in a similar application domain. • Platform-based design.

  27. Platform-based Design • Platform • Common hardware/software denominator that could be shared across multiple applications in a given application domain. • E.g. Derivative design of Qualcomm CDMA mobile station modems (MSM’s) • MSM3000  MSM3100 • MSM3100  MSM5100

  28. Derivative Design of Qualcomm CDMA Chips • MSM3000, 3100, 5100, … • Added functionality and interfaces • Base functionality and interfaces • Platform of MSM3000 series • Note • Platform consists of software parts as well as hardware ones.

  29. MSM3000

  30. MSM3100

  31. Derivative Design Example

  32. Derivative Design Example 1 MSM3000 -> 3100

  33. Derivative MSM Design • Functional viewpoint • MSM3000  3100 • + PLL, USB, PM (ADC, Vtg reg.) • D RF i/f, Vocoder (QCELP  EVRC), Codec (chip in)

  34. Derivative Design Example 2 MSM3100 -> 5100

  35. Summary of Case Study: Derivative MSM Design • Functional viewpoint • MSM3000  3100 • + PLL, USB, PM (ADC, Vtg reg.) • D RF i/f, Vocoder (QCELP  EVRC), Codec (chip in) • MSM3100  5100 • + gpsOne processor, Bluetooth baseband processor, MMC, R-UIM controllers, MP3, MIDI • D Vocoder DSP (QDSP2000) • Platform-based design in functional viewpoint • Common functionality + added/modified functionality • Architectural viewpoint?

  36. Levels of Platform-based Design • Architectural viewpoint • Fixed platform at layout or RTL • Parameterized platform • A family of parameterized platforms • Function/architecture codesign

  37. Fixed Platform [p. 113, Surviving the SoC Revolution]

  38. Fixed Platform at Layout • HW Kernel [p. 148, 156 Surviving the SoC …]

  39. Parameterized Platform • UCI, digital camera platform D$, I$ parameters size, line, assoc Bus parameters width, BI coding DCT parameters precisions

  40. Function-Architecture Co-design • SoC platforms • A family of parameterized platforms • High abstraction level design • SW-centric SoC design • Top-down flow in platform-based design • A key design step • Mapping functions to SoC platform • W/ different HW/SW, communication mapping • Thus, it is named Function-Architecture Co-design

  41. Function-Architecture Co-design Flow Algorithm Arch.-indep opt. Arch. dev. Function Architecture Local optimization Com. network design Mapping Evaluation HW/SW implementation Cosimulation/emulation

  42. Three Commercial Approaches • Cadence VCC • Coware N2C • Synopsys CoCentric

  43. Function-Architecture Co-design: Cadence Approach

  44. Function

  45. Architecture

  46. Function to Architecture Mapping

  47. Mapping to HW and SW

  48. Mapping Function to SW

  49. Mapping Function to HW

  50. Function-Architecture Co-design: Cadence Approach

More Related