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CORDIC-Based Processor

CORDIC-Based Processor. ECE 734 Project Presentation 05/08/02 Jui-Ning Cheng. Motivation. MAC unit computing is not efficient enough when the DSP algorithm includes more complicated functions, such as trigonometric, exponential, and logarithm .

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CORDIC-Based Processor

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  1. CORDIC-Based Processor ECE 734 Project Presentation 05/08/02 Jui-Ning Cheng

  2. Motivation • MAC unit computing is not efficient enough when the DSP algorithm includes more complicated functions, such as trigonometric, exponential, and logarithm. • CORDIC (COordinate Rotation DIgital Computer)is an iterative algorithm to perform vector rotations by arbitrary angles using only shifts and adds.

  3. Algorithm • The basic CORDIC iteration equations at the i-th step are: • m: Coordinate parameter (1, 0, -1) • i: Rotation direction (Rotation/Vectoring mode) • S(m,i): Shift sequence • m,i: Rotation angle • Km,i: Scaling factor

  4. x y X Reg x(n) y(n) Y Reg a(n-1) . . a(1) a(0) Barrel Shifters Barrel Shifters Z Reg z(i) i MUX MUX MUX MUX z(i+1) i i + / - + / - + / - sign(xi) sign(yi) sign(zi) x' y' rotation vectoring  generator i Architecture

  5. x x' Basic CORDIC Processor R E G Basic CORDIC Processor R E G R E G Basic CORDIC Processor y y' Pipelined Structure • Complexity is increased : Arithmetic operators are mapped into a dedicated unit, and also the additional registers between each stage. • Maximum throughput: Clock drives only one CORDIC operation per cycle.

  6. Implementation Examples • We classify these particular DSP function into three categories: (a)Linear transformations: discrete Fourier transform, Chirp-Z transform, discrete Hartley transform, and fast Fourier transform. (b)Digital filters: orthogonal digital filters, and adaptive lattice filters. (c)Matrix based digital signal processing algorithms: QR factorization, with applications to Kalman filtering, eigenvalue and singular value decompositions. • This project will exam one example in each category to illustrate the utilization of CORDIC-based processor array.

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