LBNL CCD Packaging “Yale Mount” Mechanical Analysis

1. LBNL CCD Packaging“Yale Mount” Mechanical Analysis Dan Cheng LBNL

2. Gold bump (flattened wire bond bump) applied in house CCD, 200mm thick Underfill with Epotek 301-2 glue at 60oC 1.4mm thick AlN substrate with 200mm via’s, not under bumps or CCD AlN circuits from COORS Gold plated Invar Bumps on AlN applied at 4” wafer size level then diced Connector mounted to Invar with spring loaded pins against AlN No success yet in wafer scale bump bonds with AlN… dicing leaves large chips on edges First Guess for SNAP Dan Cheng

3. Yale CCD Mount Dan Cheng

4. Solid Model Geometry (Pro/E) Rear View Front View Dan Cheng

5. Quarter-Symmetry Solid Model EPO-TEK 301-2 (50 microns thick) CCD (200 microns thick) Substrate (1.5-mm thick AlN Or 2-mm thick Si) EA9361 Epoxy (250 microns thick) Molybdenum Base (~5-mm thick) Dan Cheng

6. Finite Element Mesh Dan Cheng

7. FEA Notes • Quarter-symmetry model • Approximately 80,000 elements • Symmetric boundary constraints • X- and Y- symmetry planes fixed, allowed to “slide” • Z-symmetry plane about square hole fixed in Z-direction • Most material properties are temperature-dependent • With the exception of some Young’s Modulus numbers Dan Cheng

8. FEA Assumptions • Mounting holes • Assumed constraints—see previous slide • Did not model Gold/Indium bump bonds Dan Cheng

9. FEA Notes • Ran four cases • Case 1: AlN Substrate, Square hole • Case 2: Si Substrate, Square hole • Case 3: AlN Substrate, Square hole w/Fillets • Case 4: Si Substrate, Square hole w/Fillets Dan Cheng

10. FEA Epo-Tek Stress Contour Plot Dan Cheng

11. FEA AlN Substrate Results Dan Cheng

12. FEA Si Substrate Results Dan Cheng

13. FEA AlN Substrate Results #2 Dan Cheng

14. FEA Si Substrate Results #2 Dan Cheng

15. FEA Summary • Some material properties need to be defined at operating temperature (140 K) • Current design shows critical Epo-Tek joint at above Yield Stress of 926 psi (may change with model) Dan Cheng