by Thang Nguyen, Dipl.-Ing.-Dr. and Dieter Haerle, Dipl.-Ing.

1. Mixed-abstraction Modeling Approach with Fault Injection for Hardware-Firmware Co-design and Functional Co-verification of an Automotive Airbag System on Chip Product by Thang Nguyen, Dipl.-Ing.-Dr. and Dieter Haerle, Dipl.-Ing. System Integration and Rapid Prototype Infineon Technologies Austria AG

2. Automotive Airbag System Overview • Challengesof Airbag SoC DesignandVerification • The Mixed-abstraction Modeling Approach • Model Coverage Evaluation • Fault Injection Simulation using Global Signaling Concept • SummaryofResults/Conclusions Agenda

3. Page  ‹#› Functional Safety innovation projectbrings airbag safety to new heights Drivers • Stricter safety requirements for airbag controllers • More airbags in the car • Higher safety at lower cost Solution • New safety architecture for system-on-chip solution is compliant with the new ISO 26262 standard • Prevention of false triggering of airbags • Optimization of self tests

4. Automotive Airbag System - I …a typical airbag system from bird’s eye view

5. Automotive Airbag System - II

6. Challengesof Airbag SoC Design • Factorsthatdrive design complexity: • Based on modern sub-micronlogicand PWR technology • integrationofhighcomplexity digital circuitswithhighvoltage power drivingmodules  newarchitectureapproachwithdistributedfunctionalities in D/A/_HW andembedded FW • Compliance to ISO 26262 safetystandard • The system covers real-time embedded mixed-signal domains with high number of modules • Time-to-Market and first time right design  leads to verification challenges

7. A complete airbag SoC chip model: Top-level functional simulation = HW, FW, and co-verification “Accuracy” vs. “Speed” Interface consistency between analogue/digital and also with top-level schematic HW (A+D) behavior model for HW/FW co-verification at chip toplevel at early stage of the design phase. Effort vs. Time vs. Accuracy Modeling Requirements & Analysis

8. The Mixed-abstraction Modeling Approach • Reuse ofthechip digital RTL code • Analoguecircuitismodelledusing VHDL withsupportof real valueforthe analog behavior • Model integrationusing top-leveltape-out schematicnetlist • Firmware ROM Maskcontentisuseddirectlywiththe digital RTL ofthe model Reuse ! Reuse ! Reuse !

9. Exampleofanaloguecircuitmodeling • Resolution functionandexampleofsupply_checkmodule:

10. Functionalcoverage: Hardware (ANA + DIG) behavior Firmware behavior PWR  Chip Gobalfunctional PhysicalImpelmentationcoverage: Digital_Hardware (RTL) ROM Mask Interfaces between DIG and ANA hardwaredomain Top-level LVS connectivities Model Coverage Evaluation

11. The Mixed-abstraction Modeling Approach – Advantages/Limitations + Event basedsimulation @ chip top-level: • significantlygain in speedcomplexityandclk rate) • et. Convergency + still guaranteetheaccuracyforfunctionalverificationpurpose. +Effort (integrationandmaintenance) vs. Time (in a veryshort) vs. Accuracy (High) -Forchip TL model integration: itisstronglydependent on the DIG_TOP level • Modeling ofexternalload (capacitiveandinductive) is limited  workaround: „Global Signalling Concept“

12. Global Signaling Concept …forexternalloadmodeling …for fault injectionsimulation

13. Summary of Results/Conclusions • Virtual „prototype“ of the airbag SoC product at an early phase for firmware develop. and verification • Simulation performance: less than 1h (for a typical functional simulation run at chip top-level) • Bridging the gap between “Speed” and “Accuracy” • Project could significantly gain time-to-market and achieve design target