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Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design. Serialization Heiko Westphal. Serialization. Main idea: save area with reuse of logic Two possibilities: Reuse complete components Operating bit-wise. Serialization: Components.
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Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design Serialization Heiko Westphal
Serialization • Main idea: save area with reuse of logic • Two possibilities: • Reuse complete components • Operating bit-wise
Serialization: Components • Origin: same as pipelining:each gate just switches once each cycle • on long path operation time of single gate much smaller than period time low usage • Idea: increase usage with reusing save gates
Serialization: Components - Example clk Clk(f) Register Clk(2f) Register A C B A B C T-FF Adder MUX MUX A+B A+B Adder Adder Register A+B +C clk Clk(f) Register Register
Serialization: Components - benefit • A bit more than half area when using one component twice: • Area of the component • + Area for control logic • almost the same Period path just increased by control logic • But: 2ndclock with doubled frequency needed for inner register • more effort than for pipelining • for our metric not much benefit • Useful for non-critical paths delay of control does not matter
Serialization: bitwise • Idea: decrease width of components by operating bitwise clk(nf) clk(f) Register Register A1 An B1 Bn MUX MUX log2(n) cIN FA D-FF Counter cOut MUX MUX MUX MUX Register
Serialization: bitwise – benefit • Period: Same up to n-times of original (depends on data dependency) • Problem on area: much effort for serialization and deserialization • 2nd clock needed with frequency n times f • area reduction only for original logic area >> control logic area • Worst case: area increasment • only useful in some special cases