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基于 i386 体系结构的 Linux 启动代码分析. xlanchen@2006.6.1. 启动代码文件. linux/arch/i386/boot/bootsect.S linux/arch/i386/boot/setup.S linux/arch/i386/boot/compressed/head.S linux/arch/i386/kernel/head.S linux/arch/i386/kernel/init_task.c linux/arch/init/main.c. 实模式. 实模式是为了兼容早期的 CPU 而设置的 系统总是始于实模式 实模式下
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基于i386体系结构的Linux启动代码分析 xlanchen@2006.6.1
启动代码文件 • linux/arch/i386/boot/bootsect.S • linux/arch/i386/boot/setup.S • linux/arch/i386/boot/compressed/head.S • linux/arch/i386/kernel/head.S • linux/arch/i386/kernel/init_task.c • linux/arch/init/main.c Embedded Operating Systems
实模式 • 实模式是为了兼容早期的CPU而设置的 • 系统总是始于实模式 • 实模式下 • 地址总线:20位 • 内存范围:0~1MB • 逻辑地址 = 段地址 + 段内偏移 • 段地址 = 段寄存器中的值*16 (或左移4位) • 段寄存器长度:16bit Embedded Operating Systems
I386实模式下的内存布局图 RAM ROM-BIOS 0xF0000 0xC0000 VIDEO-BIOS VRAM 0xA0000 1-MB 0x00000 Embedded Operating Systems
软盘启动,bootsect.S 0x7c000x90000 0x7c00, BIOS 0x90000, lilo 堆栈,0x3ff4(0x4000-12), 向下增长 磁盘参数表,12Bytes,0x3ff4~0x4000 显示“Loading” Setup0x90200 系统 小内核,0x10000(64KB处),低装载 大内核,0x100000(1MB处),高装载 setup 硬盘启动,两阶段引导 装载LILO(LInuxLOader) 第一个扇区 … 装载LINUX Bootsect.S0x90000 Setup.S0x90200 系统 0x10000 0x100000 跳转到setup 软盘和硬盘启动 Embedded Operating Systems
初始化硬件设备并为内核程序的执行建立环境 内存检测 键盘 视频 磁盘控制器 IBM微通道总线MCA PS/2设备(总线鼠标) APM BIOS 若低装载,将系统移动到0x1000处(4KB处)否则,不必 临时IDT和临时GDT FPU PIC, 16个硬件中断中断向量32~47 实模式保护模式 Startup_32 Setup Embedded Operating Systems
Compressed/head.S • Startup_32 • 初始化段寄存器和一个临时堆栈 • 初始化BSS段 • 解压缩 • 高装载或低装载解压缩0x100000(1MB) • 跳转到0x100000处 Embedded Operating Systems
Head.S • Startup_32 • 初始化段寄存器 • 建立进程0的内核堆栈 • Setup_idt • 拷贝系统参数 • 识别处理器 • GDT、IDT • Start_kernel Embedded Operating Systems
The system-segment registers • In protected-mode the CPU needs quick access to some important data-structures, such as: • Memory-Segment Descriptors • Interrupt-Gate Descriptors • Call-Gate Descriptors • Task-State Descriptors • Page-Directory and Page-Table Descriptors • Special CPU registers locate these items Embedded Operating Systems
47 16 15 0 Segment Base-Address Segment Limit 32 bits 16 bits GDT and IDT • Two most vital system registers for protected-mode execution are: • GDTR (Global Descriptor Table Register) • IDTR (Interrupt Descriptor Table Register) • 48-bits widebase-address + segment-limit (an array of descriptors, the GDT & the IDT) • Special instructions • SGDT/LGDT, SIDT/LIDT Embedded Operating Systems
Interrupt Descriptor Table descriptor Global Descriptor Table descriptor descriptor descriptor descriptor descriptor descriptor descriptor descriptor descriptor descriptor descriptor descriptor descriptor descriptor descriptor GDTR descriptor descriptor descriptor descriptor IDTR System Relationships Embedded Operating Systems
LDT and TSS • For protected-mode multitasking, the CPU needs to access two other data-structures: • The current Local Descriptor Table (LDT) • The current Task-State Segment (TSS) • Again, special registers tell the CPU where to find these data-structures in memory (assuming protected-mode is enabled) • Instructions: • SLDT/LLDT, STR/LTR Embedded Operating Systems
Control Registers • CR0 • CR1 • CR2 • CR3 Embedded Operating Systems
CR0 • CR0, MSW register (Machine Status Word, 32-bit version) • Contains system control flags that control operating mode and states of the processor • PE-bit (Protection Enabled) 0 CPU is in real-mode, 1 CPU is in protected-mode • Instruction: lmsw • LINUX’ setup.S: • movw $1, %ax • lmsw %ax • jmp flush_instr // why? • flush_instr: • To turn on the PE-bit (enables protected-mode), Embedded Operating Systems
CR1、CR2、CR3 • CR1 • Reserved • CR2 • Contains the page-fault linear address (the linear address that caused a page fault) • CR3 • Contains the physical address of the base of the page directory and two flags (PCD & PWT) Embedded Operating Systems
31 16 Base[31..24] G D R S V A V L Limit [19..16] P D P L S X C / D R / W A Base[23..16] Base[15..0] Limit[15..0] 0 15 Segment Descriptor Format Embedded Operating Systems
15 2 1 0 index TI RPL Segment selector “Hidden” part of Segment Registers selector Segment base Segment limit Access rights The “invisible” parts of a segment-register The programmer-visible part of a segment-register Embedded Operating Systems
COLOR TEXT 32-KB 0xB8000 MONOCHROME TEXT 32-KB 0xB0000 GRAPHICS 64-KB 0xA0000 Three VRAM zones Embedded Operating Systems
Array of picture-elements • Text-mode VRAM is organized as an array • Each array-element occupies one word • Word’s LSB holds ascii character-code • Word’s MSB holds a color-number pair 0 12 11 8 7 15 bgcolor fgcolor ASCII character-code nybble nybble byte Embedded Operating Systems
Blink R G B Intense G B R background color attribute foreground color attribute Color-Attribute Byte Embedded Operating Systems
80 columns characters 0..79 characters 80..159 25 rows characters 1920..1999 Video screen Screen-element locations Embedded Operating Systems
逻辑地址 线性地址 物理地址 分段单元 分页单元 内存寻址 • 逻辑地址 • 段:偏移量 • 线性地址 • 32位无符号整数,0~4G-1, 即0x00000000~0xFFFFFFFF • 物理地址 • 芯片级内存单元寻址 • 地址转换过程 Embedded Operating Systems
实模式?保护模式?分页? • Real mode • Exists mostly to maintain processor compatibility with older models, & • To allow the OS to bootstrap Embedded Operating Systems
段选择子 2 1 0 15 index TI RPL Segment selector Embedded Operating Systems
__KERNEL_CS 0x10 = 0000 0000 0001 0000b Index(0x2), TI(0), RPL(0, highest) limit(0xFFFFF), base(0), G(1, =4096), D(1,=32位), P(1, in main memory), DPL(0, hignest), S(1), type(0xA) E(1), executable, code C(0), not current R(1), readable A(0), unaccessed gdt: .word 0, 0, 0, 0 # dummy .word 0, 0, 0, 0 # unused .word 0xFFFF # 4Gb.word 0 # base address = 0 .word 0x9A00 # code read/exec.word 0x00CF # granularity(4096).word 0xFFFF # 4Gb .word 0 # base address = 0 .word 0x9200 # data read/write .word 0x00CF # granularity(4096) __KERNEL_CS Embedded Operating Systems
段描述符 Embedded Operating Systems
Segment selector Segment-offset Logical Address: Segment Descriptor Table descriptor Validity is checked by CPU Segment Base-address descriptor + (also Segment-Limit and Access Rights) descriptor descriptor Physical Address: Operand’s effective address 逻辑地址的转换 Embedded Operating Systems
分页 • PG • Paging (bit 31 of CR0). • 1 Enables paging with PE=1, • Linearaddress space is divided into fixed-size pages (4KB, 2MB, or 4MB) that can be mapped into physical memory and/or diskstorage using paging mechanism. • 0 Disables paging, linear addresses = physical addresses. Embedded Operating Systems
lss • lss a, %esp ; dses, aesp Embedded Operating Systems