Dual-frequency Antenna Design for RFID Application

1. Dual-frequency Antenna Design for RFID Application Kin Seong Leong Auto-ID Laboratory, School of Electrical and Electronic Engineering, The University of Adelaide

2. Introduction • Radio Frequency Identification (RFID) • Enable supply chain automation. • Item level tagging • Each and every item has it own tag with unique ID. • Tag is usually passive.

3. Frequency Bands in RFID • LF (<135 kHz) • HF (13.56 MHz) • UHF (860 – 960 MHz) • Microwave (2.45 GHz)

4. Frequency Band in RFID • LF (<135 kHz) • HF (13.56 MHz) • UHF (860 – 960 MHz) • Microwave (2.45 GHz)  

5. HF vs UHF

6. Proposal Formulation Merge HF and UHF Dual Frequency Antenna (With frequency ratio ≈ 70)

7. Current Technology • Microstrip patch antenna • Too low frequency ratio (< 5). • Common aperture antenna • Dual feed point

8. Brain Storming • Merging a HF antenna and an UHF antenna. • Idea: • A HF multi-turn coil antenna. • A UHF planar dipole. • A transmission line to separate both the above antennas.

9. Design Aim (1) • Antenna impedance equals to the complement of the input impedance of the RFID chip at UHF operation • Design frequency: 960 MHz • Chip impedance: 17 - j150Ω • Design aim: 17 + j150Ω • A resonance point at HF. • Parallel resonance. • Zero reactance and infinite resistance.

10. Design Aim (2) • A single feed antenna. • Avoid modification on existing chip • Reasonable antenna size and cost. • Not the focus of this paper. • The final design must not be larger than 14400 mm square.

11. A Simple HF RFID Antenna • A multi-turn planar spiral antenna.

12. A Simple UHF RFID Antenna • A dipole with matching network. • RFID chip is usually capacitive. The matching network is to transform the antenna into inductive to enable conjugate matching.

13. An Initial Picture • Feed point chosen to be at B.

14. Final Design

15. Chip Final Design (1) • Transmission line to transfer the HF coil antenna impedance to very high value (ideally open circuit).

16. Chip Final Design (2) • Overlapping loops to provide high capacitance.

17. Chip Final Design (3) • A gap to prevent the UHF antenna shorting the HF antenna. A patch on the bottom provides path for UHF operation.

18. Chip Final Design (4) • DC path for rectifier circuit (some type).

19. Simulation • Using Ansoft HFSS • Simulated impedance (at 960 MHz): • 24 + j143Ω • Very near to the target of 17 + j150Ω • Resonance near 13.56 Mz

20. Fabrication • On double-sided FR4

21. Measurement Setup SMA Connector (At the chip location)

22. HF Testing • Transmission measurement: Resonance at HF.

23. UHF Testing (1) • Impedance measurement: Matching impedance with respect to RFID chip.

24. UHF Testing (2) • At 960 MHz: • 50 + j135Ω • Balance to unbalance problem • BALUN needed. • Pattern in good agreement

25. Future Work • Miniaturization. • To fit in small objects. • Actual testing with RFID chips. • To obtain performance (read range) measurement.

26. Conclusion • a detailed design for a high frequency ratio dual-frequency antenna.