Understanding SDH and SONET in Data Networks

1. Datornätverk A – lektion 7 Forts. Kapitel 9: SDH och SONET. Kapitel 10: Felhantering.

2. Figure 6.18PCM hierarchy – Circuit Oriented TDM

3. Table 6.2 The European PCM hierarchy

4. Optical Hierarchies • The old PCM hierarchy was non-synchronous • Different multiplexors may have slightly different clock frequency. • The whole hierarchy had to be unpacked in view to access or monitor a single telephone call, which was expensive. • SDH and SONET use synchronous communication • Clocked by a central master clock. • SDH (Synchronous Digital Hierarchy) • A standard for TDM in Europe • SONET (Synchronious Optical NETwork) • A standard for TDM used in United States • IP-over-SDH/SONET allows several ISP:s to share the same fiber cable independently.

5. Note: SONET and SDH are synchronous TDM systems controlled by a master clock.

6. Figure 9.10A SONET

7. Figure 9.11Frame format

8. Table 9.1 SONET rates

9. Figure 9.12Data rate

10. Figure 9.13VT types

11. Figure 9.12Data rate

12. Figure 9.11Frame format SPE = Synchronous Payload Envelope

13. Figure 9.13VT types

14. PART III Data Link Layer

15. Position of the data-link layer

16. LLC and MAC sublayers

17. IEEE standards for LANs

18. Chapter 10 Error DetectionandCorrection

19. Note: Data can be corrupted during transmission. For reliable communication, errors must be detected and corrected.

20. 10.1 Types of Error Single-Bit Error Burst Error

21. Note: In a single-bit error, only one bit in the data unit has changed.

22. 10.1Single-bit error

23. Note: A burst error means that 2 or more bits in the data unit have changed.

24. 10.2Burst error of length 5

25. Note: Error detection uses the concept of redundancy, which means adding extra bits for detecting errors at the destination.

26. 10.3Redundancy

27. 10.4Detection methods

28. Note: In parity check, a parity bit is added to every data unit so that the total number of 1s is even (or odd for odd-parity).

29. Example 1 Suppose the sender wants to send the word world. In ASCII (7-bit code) the five characters are coded as 1110111 1101111 1110010 1101100 1100100 Even parity is used. The following shows the actual bits sent: 11101110 11011110 11100100 11011000 11001001

30. Example 3 Now suppose the word world in Example 1 is received by the receiver without being corrupted in transmission. 11101110 11011110 11100100 11011000 11001001 The receiver counts the 1s in each character and comes up with even numbers (6, 6, 4, 4, 4). The data are accepted. Now suppose the word world in Example 1 is corrupted during transmission. 11111110 11011110 11101100 11011000 11001001 The receiver counts the 1s in each character and comes up with even and odd numbers (7, 6, 5, 4, 4). The receiver knows that the data are corrupted, discards them, and asks for retransmission.

31. Note: Simple parity check can detect all single-bit errors. It can detect burst errors only if the total number of errors in each data unit is odd.

32. Note: In two-dimensional parity check, a block of bits is divided into rows and a redundant row of bits is added to the whole block.

33. 10.6Two-dimensional parity

34. Example 4 Suppose the following block is sent: 10101001 00111001 11011101 11100111 10101010 However, it is hit by a burst noise of length 8, and some bits are corrupted. 1010000000001001 11011101 11100111 10101010 When the receiver checks the parity bits, some of the bits do not follow the even-parity rule and the whole block is discarded. 10100000 00001001 11011101 11100111 10101010

35. 10.7CRC generator and checker CRC = Cyclic Redundency Check

36. ”Vanlig” division (Kvot) 0 3 Nominator (Täljare) 5 17 1 7 . 1 5 2 (Nämnare) Reminder (Rest) Haltande liknelse med CRC: Om vi subtraherar täljaren (17) med resten (2) vi ett tal som är jämnt delbart med nämnaren (5). Om mottagaren tar emot något som inte är delbart med 5 har sannolikt att bitfel uppstått.

37. Modulo 2 Arithmetic • In modulo 2 arithmetic addition and substruction are identical to EXCLUSUVE OR (XOR) operation. • Multiplication and division are the same as in base-2 arithmetic without carries in addition or borrows in substraction. Examples: 1011 XOR 0101 = 1110 1001 XOR 1101 = 0100 0 XOR 0 = 0 0 XOR 1 = 1 1 XOR 0 = 1 1 XOR 1 = 0

38. 10.8Binary division in a CRC generator The number of 0s is one less than the number of bits in G (divisor)

39. 10.8Binary division in a CRC generator The first bit in the numerator is 1. Then the first bit in the quotient is 1. The first bit in the quotient is 1 and one times the divisor results in this Obtained by XOR-ing 1001 and 1101

40. 10.8Binary division in a CRC generator Transmitted data: 1 0 0 1 0 0 0 0 1

41. 10.9Binary division in CRC checker

42. Another Example The transmitted data is 11010110111110

43. 10.11A polynomial representing a divisor 7th orderpolynomial 8 bit divisor

44. Polynomyal representation • Based upon discrete mathetematics, where bit strings are treated as polynomials. • k bit divisor is represented as (k-1) degree polynomial with coefficients 0 and 1. • Example: 1010110 has 7 bits • It can be represented as a polynomial of 6th degree 1·x6 + 0·x5 + 1·x4 +0·x3 + 1·x2 + 1·x1 + 0·x0 = x6 + x4 + x2 + x

45. Table 10.1 Standard polynomials

46. Example 5 It is obvious that we cannot choose x (binary 10), x2 (binary 100), etc, because then the reminder is 0. We cannot chose a polynomial that is divisible by x, for example x2 + x (binary 110). However, we can choose x + 1 (binary 11) because it is not divisible by x, but is divisible by x + 1. We can also choose x2 + 1 (binary 101) because it is divisible by x + 1 (binary division).

47. k bits n bits Data bits to be sent CRC bits How CRC Operates • The sender wants to send k bits message • The sender and the receiver must agree in advance on n+1 bit string called generator polynomial (divisor), G. • G can be represented as n-degree polynomial • nredundant bits are added to the k bits message. They are called CRC bits.

48. How CRC Operates (Cont.) • The redundant bits are chosen in such a way that the resulting k+n bit string is exactly divisible (with a reminder=0) by G using modulo 2 arithmetic. • The receiver divides the received data together with the CRC bits by G using modulo 2 arithmetic. • If the reminder is 0, then the string is considered to be without errors • If the reminder is not 0, the data unit is with errors and it is rejected

49. Example 6 The CRC-12 x12 + x11 + x3 + x + 1 which has a degree of 12, will detect all burst errors affecting an odd number of bits, will detect all burst errors with a length less than or equal to 12, and will detect, 99.97 percent of the time, burst errors with a length of 12 or more.

50. 10.12Checksum