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Learn about the operation, modes, and types of photodiodes such as PIN and avalanche photodiodes, as well as MOSFET detectors. Explore the principles, characteristics, and applications of semiconductor detectors.
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Semiconductor Detectors • Many varieties • Si strip detector • Si pixel detector • Si drift chamber • CCD (Charged Coupled Device) • Surface barrier • PIN photodiode • Avalanche photodiode • a-Se + TFT (Thin Film Transistor) arrays
Photodiodes • Photodiodes are semiconductor detectors that convert light into an electric current • Also responsive to charged particles • Used in a wide variety of applications in science and commercially • All p-n junctions (diodes) are light sensitive • Photodiodes are designed to optimize this effect
Silicon and Visible Light • Why is silicon black?
Wavelength (m) Vis UV IR Absorption coefficient (), cm-1 Eg ~ vis Photon energy (eV) Absorption spectrum of a semiconductor. Silicon and Visible Light • Absorption coefficient
Photodiodes • Basic principle
Photodiodes • Notes • P-layer is thin (1 mm) (usually from diffusion of boron) • Spectral response and speed is determined by thicknesses of the different layers
NA > ND (a)Current flow (b)Charge density (c)Electric field (d)Electrostatic potential : built in potential under zero bias p-n Junction Review
Photodiodes • Operation • Electron-hole pairs are created throughout the photodiode • Those in the depletion layer are accelerated to their respective sides (electrons to n, holes to p) • Electrons generated in the n-layer, along with diffusion electrons from the p-layer, are left in the conduction band • Holes generated in the n-layer diffuse to the depletion layer and are collected in the p-layer valance band • Of course, some of the charge carriers created outside the depletion region will recombine and disappear
Photodiodes • Operation • The result is a negative charge in the n-layer and a positive charge in the p-layer • If an external circuit is connected between the n- and p-layers, a photocurrent will be produced
Photodiodes • Modes of operation • Photovoltaic • No bias • Signal detected as a voltage • Minimum dark current • Solar cells use this mode • Photoconductive mode • Reverse bias • Signal detected as a current • Smaller capacitance (larger depletion region) decreases the noise and the rise time (speed)
Photodiodes • Responsivity or sensitivity R = I/P (A/W) • QE = % photons contributing to the photocurrent = 1240 R / l (nm)
Photodiodes • V-I curve
PIN Photodiode • PIN type • Uses a high-resistance i layer between the p and n layers that effectively increases the depletion width • Further improves the response time
Avalanche Photodiode • Avalanche type • A high field region is created in which carrier multiplication takes place • Impact of energetic conduction electrons with the crystal lattice transfers some of the electron’s KE to a valance electron • Gain of 100-1000 is typical
Schottky Photodiode • Schottky type • Uses a thin metal (gold) layer in place of the p layer • Increases UV sensitivity since distance from surface to junction is small
MOSFET • Enhancement-mode MOSFET
MOSFET • Current flows when VGS>Vt
MOSFET • Connecting a small voltage to the gate Vgs (relative to the source, and thus the substrate), attracts electrons to the gate • The oxide insulation prevents current from entering the gate and forms a parallel plate capacitor • These electrons induce an n-type region called a channel • This is called an NMOS transistor • The value required to form the conducting channel is called the threshold voltage and is denoted Vt
MOSFET • Characteristic I-V curve
MOSFET • Applying a small (~50 mV) Vds will cause current (electrons) to flow from source to drain • The NMOS transistor is essentially a transistor here • Increasing Vgs > Vt attracts more electrons to the channel thus decreasing the resistance and increasing the current • Increasing Vds further such that Vgd=Vt decreases the channel depth to almost zero • The channel is pinched off and the drain current saturates
MOSFET • Increasing Vds pinches the channel off at the drain end, thus saturating the current
MOSFET • Exposure to radiation causes a buildup of holes (for p-channel devices) in oxide defects in the SiO2
MOSFET Detectors • A buildup of holes occurs because of • A build-up of trapped charge in the SiO2 • An increase in the number of interface traps • An increase in the number of bulk oxide traps • The buildup of holes in the oxide results in an increase in Vt proportional to the absorbed dose • What is measured is the voltage required to maintain a given constant source-drain current through the device
Al Al SiO2 P+ P+ n+ Cross section of a AC coupled strip detector Cross section of a DC coupled strip detector Silicon Strip Detectors • Silicon detector segmented in long, narrow strips • Detector thickness typically ~ 300 μm • Detector resistivity typically ~ 2kWcm • Strip “pitch” is typically 20-50 μm wide • Analog or digital readout • AC or DC coupled readout SiO2
Planar process N-type silicon B B n-type wafers are oxidized at 1030oC to have the whole surface passivated. SiO2 Using photolithographic and etching techniques, windows are created in the oxide to enable ion implantation. Different geometries of pads and strips can be achieved using appropriate masks. The next step is the doping of silicon by ion implantation. Dopant ions are produced from a gaseous source by ionisation using high voltage.The ions are accelerated in an alectric field to energy in the range of 10 keV-100 keV and then the ion beam is directed to the wondows in the oxide. P+ strips are implanted with boron, while phosphorous or arsenic are used for the n+ contacts. As P+ An annealing process at 600oC allows partial recovery of the lattice from the damage caused by irradiation. n+ Al The next step is the metallisation with aluminium, required to make electrical contact to the silicon. The desired pattern can be achieved using appropriate masks. The last step before cutting is the passivation, which helps to maintain low leakage currents and protects the junction region from mechanical and ambient degradation. General description of silicon detectors
Silicon Strip Detectors • In HEP, the main use of silicon detectors is for precision tracking • Recall we derived an expression for the momentum resolution of a “tracker” in a magnetic field • Additionally, silicon detectors are used for b-quark tagging • b quarks are an indication of interesting physics • t b-quarks ~ 1.5 ps • Distance traveled in lab = gct ~ 4500 mm
b = distance of closest approach of a reconstructed track to the true interaction point b beam B-Tagging • SVT (secondary vertex tagging) • IP (impact parameter) L Secondary vertex Primary vertex
xp QR QL x d Silicon Strip Detectors • Position resolution • Resolution of digital (1/0) readout is pitch/√12 • As the charge clouds drift to the electrodes, they diffuse and tend to grow causing charge sharing • Can be improved by analog readout with center of gravity or η function to determine position
Silicon Strip Detectors • Position resolution • η = QR/(QR+QL) = x/d • Non linear charge sharing due to Gaussian charge cloud shape
CMS Silicon Tracker Strip lengths 10 cm (innermost) to 20 cm (outermost) Strip pitches 80mm (innermost) to 205mm (outermost)
CMS Silicon Tracker • Fun facts • 100 kg of silicon • 207 m2 of silicon • 10,000,000 individual strips • 26,000,000 individual wirebond wires
Silicon Strip Detectors • Depletion behavior is found by measuring the capacitance as a function of the bias voltage • C = A√(ε/2ρμVb)
Guard Rings • We’ve treated the strip detector as being infinitely large when in fact there are edges • Guard rings are used to • Define the active depletion region • Minimize leakage currents to the outermost strips • Avoid high fields at the edges
Wire Bonding • Wire bonding is used for sensor-sensor and sensor-front end electronics connections
Wire Bonding • Uses ultrasonic power to vibrate needle-like tool on top of wire • Friction welds wire to metallized substrate underneath • Can easily handle 80μm pitch in a single row and 40μm in two staggered rows (typical FE chip input pitch is 44μm) • Generally use 25μm diameter aluminium wire and bond to aluminium pads (chips) or gold pads (hybrid substrates) • Heavily used in industry (PC processors) but not with such thin wire or small pitch
barrel 1.2 m H disk 26 cm F disk 10.5 cm p p SMT half cylinder 793k channels D0 SMT Detector