370 likes | 396 Views
This tutorial guides you through setting up a working platform using Avnet Virtex-II Pro Development hardware, storing systems in compact flash, configuring FPGAs, retrieving network packets via Ethernet, and using XMD for software development assistance. This includes software setup with EDK 7.1 and ISE 7.1, hardware setup with specific cables, connections and Xilinx tools, configuring processors, setting I/O interfaces and internal peripherals, as well as building and downloading hardware and software designs. It also covers testing applications and monitoring outputs for successful execution. References from Xilinx documentation sources are provided for further reading. 8 Relevant
E N D
EDK 7.1 Tutorial -- SystemACE and EthernetMAC on Avnet Virtex II pro Development Boards Chia-Tien Dan Lo Department of Computer Science University of Texas at San Antonio
Goals • Avnet Virtex II pro Development is equipped with compact flash memory and gigabit Ethernet interface. • To build a working platform: • Store system in the compact flash • Configure FPGAs from compact flash • Retrieve network packets directly from the Ethernet interface • Store results back to compact flash • Use XMD to assist software development and test
Premise • Software • Using EDK 7.1 and ISE 7.1 • Download Avnet XBD file for EDK 7.1 • Using Windows XP • Hardware • Using Avnet Virtex-II pro development board (XC2VP30-6) • Xilinx Parallel Cable IV (DLC7) • ADS-DB9-MD7 Cable
Setup • Connect Xilinx Parallel Cable IV from PC’s printer port to JTAG4 on Avnet board • Omit this if using PCI interface • Connect ADS-DB9-MD6-Cable from PC’s Com1 port to JS1 on Avnet board • Connect J8 to a Ethernet router
Using EDK7.1 BSB Wizard • In case Base System Builder Wizard won’t create a new directory, manually create a project directory, say “c:\download\SysaceEthernetTest” • Start EDK 7.1 and check Base System Builder Wizard
Select Avnet Virtex-II pro Board Note: the Avnet XBD file has to be stored in the directory: C:\EDK7.1i\board\Xilinx\boards\Avnet_V2P30_FF896
Configure Processor • Set processor clock to 300 MHz • Set FPGA JTAG • Enable cache • On-Chip Memory • Data: 64K • Instruction: 128K
Set I/O Interface • Set RS232 to • OPB UARTLITE • 19200 bps • 8 data bits • No parity • Use interrupt • Uncheck • SDRAM_64Mx16 • SRAM
Set System ACE and Ethernet • Uncheck • FLASH_4Mx32 • Check • SysACE_CompactFlash • OPB SYSACE • Use Interrupt • Ethernet_MAC • PLB ETHERNET • No DMA • Use Interrupt
Set Internal Peripheral • Set PLB BRAM IF CNTLR • plb_bram_if_cntlr_1 • 16K
Software Setup • Set standard I/O to RS232 • Check • Memory Test • Peripheral SelfTest
Configure memory for test applications • Set instructions to on-chip instruction memory (iocm_cntlr) • Set data and stack/heap to on-chip data memory (docm_cntlr)
Build Hardware: Toos->Update BitstreamThis step may take hours subject to the performance of the PC!
Download Hardware Design to FPGAs • Start iMPACT from XP’s start menu (EDK’s download function may not work!) • Assign implementation/download.bit to XC2VP30 device
Download Test Applications • In XMD console • Change directory to applications • “cd TestApp_Peripheral” • Download the design • “dow executable.elf” • Run the application • “run” • Monitor the output in the hyper terminal • Some messages should be shown if everything is okay
References • Xilinx Platform Studio User Guide, Embedded Development Kit EDK 7.1 • Xilinx Embedded System Tools Reference Manual, Embedded Development Kit EDK 7.1i • Xilinx Platform Specification Format Reference Manual, Embedded Development Kit EDK 7.1i • Xilinx OS and Libraries Document Collection • Xilinx EDK PowerPC Tutorial • Avnet User’s Guide, Xilinx Virtex-II Pro Development Kit