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AS I C & W e i g ht e d Multi p l e Sampl i n g

Th eo r e t i ca l Fr a m e w o r k , Si m u l a t i o n R esu lts a nd Pl a ns for a n ASIC to I m p l e m en t W e igh ted M u l tiple Sam p l i n g in Sci en t ific C C Ds.

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AS I C & W e i g ht e d Multi p l e Sampl i n g

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  1. TheoreticalFramework,Simulation Results and Plans foranASICto Implement WeightedMultiple Samplingin ScientificCCDs DaniGuzmán, CristóbalAlessandri,ÁngelAbusleme, DiegoÁvila, Marcelo Guarini,Enrique Álvarez, HernánCampillo,Alexandra Gallyas,Christian Oberli PontificiaUniversidad Católica(PUC) Astro-EngineeringCenter IntegratedCircuits Group Santiago,CHILE

  2. ASIC& Weighted MultipleSampling CCDoutput 100 Output Samples 50 0 -50 -100 -150 Level[V] -200 0 10 20 30 40 50 time[s] 60 70 80 90 100 Filter coefficients 0.04 Averaging filter Optimal filter0.02 0 -0.02 Coefficient -0.04 0 20 40 60 80 100 Sample 120 140 160 180 200 Mixedsignal chip designed atPUC Framework developedforparticlephysics calorimeters AdaptedtoCCD readout: ananalyticalmethodtodetermineweighting coefficientsbynoiseminimization Reducesnoisefloordueto Flickernoise,forslow pixeltimes Inagreement withpublishedresults ● ● 1poly–6 metal 180nmCMOSprocess. Die size:2.742mm×2.84mm. ASICforCCDtobe designedtoinclude: – ● ● ● PreampsADCs Clock drivers – ● – – ● Toworkcryogenically ● Gach(PASP2003) Clapp(SPIE2012) – –

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