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Design and Implementation of VLSI Systems (EN1600) Lecture 27: Datapath Subsystems 3/4. Prof. Sherief Reda Division of Engineering, Brown University Spring 2008. [sources: Weste/Addison Wesley – Rabaey/Pearson]. Manchester carry adder. Using transmission gates Using dynamic gates.
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Design and Implementation of VLSI Systems (EN1600) Lecture 27: Datapath Subsystems 3/4 Prof. Sherief Reda Division of Engineering, Brown University Spring 2008 [sources: Weste/Addison Wesley – Rabaey/Pearson]
Manchester carry adder • Using transmission gates • Using dynamic gates
Manchester carry chains Critical path involves a series propagate transistor for each bit a significant over carry-ripple (which used majority or AND-OR gate)
Carry skip adder A3 B3 A2 B2 A1 B1 A0 B0 Co,3 FA FA FA FA Ci,0 Co,3 S3 S2 S1 S0 BP = P0 P1 P2 P3 “Block Propagate” If (P0 & P1 & P2 & P3 = 1) then Co,3 = Ci,0 otherwise the block itself kills or generates the carry internally
Carry-ripple is slow through all N stages Carry-skip allows carry to skip over groups of n bits Decision based on n-bit propagate signal Carry-skip adder Original design by Charles Babbage
Carry-lookahead adder Similar to the carry-skip adder, but computes generate signals as well as group propagate signals to avoid waiting for a ripple to determine if the group generates a carry.
Carry-select adder • One adder calculates the sums assuming a carry-n of 0 while the other calculates the sums assuming a carry-in of 1. • The actual carry triggers a multiplexer that chooses the appropriate sum
0’s detector and 1’s detectors Equality comparator: A = B Magnitude comparator: A < B II. Comparators
1’s detector: N-input AND gate 0’s detector: NOTs + 1’s detector (N-input NOR) When is this circuit structure a good idea? A. 1’s and 0’s detectors
Check if each bit is equal (XNOR, aka equality gate) 1’s detect on bitwise equality B. Equality comparator
C. Magnitude comparator • Compute B-A and look at sign • B-A = B + ~A + 1 • For unsigned numbers, carry out is sign bit