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Effect of post processes on characteristics of SSG dielectrics. Experiment. << Original process >>. << Modified process >>. Dipping I (Precursor adsorption). Dipping I (Precursor adsorption). Dipping II (Washing). Dipping II (Washing). 10 cycles. 10 cycles. Dipping III
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Effect of post processes on characteristics of SSG dielectrics
Experiment << Original process >> << Modified process >> Dipping I (Precursor adsorption) Dipping I (Precursor adsorption) Dipping II (Washing) Dipping II (Washing) 10 cycles 10 cycles Dipping III (Hydrolysis) Dipping III (Hydrolysis) Annealing 300ºC, 5min, air Annealing 500ºC, 10min, air Annealing 500ºC, 10min, air
Experiment << TDS of SSG-HfO2 >> 170~400ºC Thermal decomposition of residual alkoxide Annealing temperature: 300~400ºC
Experiment << Result >> By repeated annealing, middle layer may be increased (!) Processing temperature was increased to ~40ºC, by nearby heating plate
Experiment << Annealing effect >> Additional annealing but under N2 atmosphere → no additional oxidation Similar process (RTA between ALD deposition) produces HfSiOx interlayer (750ºC)
Experiment << TFT device with sputtered In2O3>> << Source-gate current >> << Source-drain current >> High leakage Ig (A) Ids (A) Sputtering damage? V (V) V (V)
Experiment << TFT device with ZnO nanowire >> << Source-gate current >> << Source-drain current >> Under nA Ig (A) Ids (A) V (V) V (V)
Effects of post processes << Post-processes >> Post-annealing Silicon oxidation Interlayer growth EOTS ↑ Capacitance degradation Plasma treatment << TFT fabrication >> Sol-gel spin-coating Chemical damage Physical damage Interdiffusion EOTS↓ Increased gate leakage Sputtering
Middle layer << Middle layer >> Initially native oxide is etched away but, SiO2 layer is formed during surface treatment 19 → 8.2 Dielectric constant is decreased = SiO2layer decreases total capacitance of gate dielectric stack
Middle layer << Surface treatment >> HF-etched silicon surface is H-terminated sol-gel precursor cannot be attached on surface H H H OH OH OH Si oxidation! Surface OH-termination is oxidative process (Oxygen plasma, UV-ozone, etc.)
Middle layer << SAM treatment >> ex) deposition on QCM crystal Gold surface is very stable – OH termination is impossible 2-mercaptoethanol Only used for thickness measurement Insertion of organic layer– low thermal stability
Annealing << Annealing effect >> Residuals are removed Water,ethanol evaporation Hydroxide decomposition Alkoxide decomposition Organic combusion > 400ºC Water evaporation Carbon chain HfO2 is easily crystallized at ~500ºC SSG film forms ~10nm grains
Plasma << Low-temperature O2 plasma >> Organic-inorganic composite + O2 plasma treatment → Nanoporoustitania
Plasma << Effects of O2 plasma >> PAA almost completely removed by low temperature plasma With TiO2-only film, 5Hz increased (Small quantity of SAM and butoxide) Thermal annealing can’t be replaced for gate dielectric application - H2O and hydroxides remain
Plasma << Plasma penetration depth >> Frequency shift is not increased after 15-deposition cycles Penetration depth ~10 layers
Spin-coating << Chemical stability of HfO2 >> Chemical stability of HfO2 is known to very good Etching characteristic of amines are not reported (amine fluorides can etch) << Physical durability of HfO2 >> Durability against sputtering damage: HfO2is better than SiO2
Sputtering << Physical durability of HfO2 >> Heavy and dense HfO2 film is more immune to bombardment damage Ex) MoN on HfO2 and SiO2 Mo concentration in HfO2 < 0.2ppb
TFT device << TFT device with SSG gate dielectric >> Pentacene TFT - No damage on dielectric on deposition PS-TiO2 bilayer gate dielectric PS bottom layer effectively decreases gate leakage current (by 103)
TFT device << TFT device with SSG gate dielectric >> Capacitance is sacrificed Surface roughness can be source of the high leakage current SSG HfO2 – RMS ~2nm increased when annealed
TFT device << Leakage current of SSG dielectrics >> TiO2 HfO2 Leakage current of SSG-HfO2 is much lower than SSG-TiO2
Interaction with active layer << ITO sputtering on HfO2 >> ITO/HAH/ITO capacitor HAH: HfO2/Al2O3/HfO2 (9/1.8/9 nm) Thin Al2O3 for prevent crystallization ITO sputtering on top of HfO2 Leakage current was not increased
Interaction with active layer << Interaction between ITO and HfO2 >> After thermal annealing (500ºC, 1min, vacuum) Electrical characteristic of HfO2 is changed XRD peak is identical before and after annealing No crystallization effect
Interaction with active layer << Interaction between ITO and HfO2 >> In case of both dielectric interdiffusion occurs between ITO/dielectric Leakage current of Al2O3 is increased by interdiffusion (data not shown)
Conclusion • Capacitance value of SSG dielectric is not reached reference value yet • Experimental results are not uniform and it is not easy to obtain best data • High leakage current of TFT devices – many possibilities are considered • Sputtering damage and chemical damage are excluded • Indium oxide derivatives may be avoided as active layer
Future work • More adjustment on annealing condition • GIO active layer with shorter annealing (10min) • Active layer: zinc oxide derivatives • Thicker dielectric (20 deposition cycles)