MOBY DIC TOOLBOX

1. MOBY DIC TOOLBOX MOBY-DIC WORKSHOP Noordwijkerhout, 23-08-2012

2. DESCRIPTION Mainfeatures: MATLAB / SIMULINK Objectorientedprogramming GraphicalUser Interface HTML Documentation GPL v2 license (open source) http://ncas.dibe.unige.it/software/MOBY-DIC_Toolbox/ Requirements: MATLAB R2008a or newer C / C++ compiler Hybrid Toolbox Multi Parametric Toolbox (MPT) Yalmip MATLAB R2011a and Xilinx System Generator (onlyfor HDL simulation)

3. CONTROL/CIRCUIT CO-DESIGN PLANT EMBEDDED CONTROLLER Fast Small Low-power Low-cost

4. GOAL OF THE TOOLBOX (1) Control/circuit co-design LINEAR SYSTEM CONSTRAINTS CONTROL SPECS. FPGA/ASIC IMPLEMENTATION CLOSED-LOOP SIMULATION CIRCUIT SPECS. DIGITAL CIRCUIT

5. CONTROL DESIGN generateMPCfunction CallsHybrid Toolbox or Multi Parametric Toolboxtocomputeexplicit MPC controllaw @linearSystemobject LINEAR SYSTEM CONSTRAINTS CONTROL SPECS. GENERATE MPC @constraintsobject @pwagobject Piecewise Affine functiondefinedovergenericpolytopicpartition PWAG

6. CIRCUIT DESIGN getCircuitPerformances Gets information aboutcircuitperformances in advance. PWAG getCircuitPerformances synthesizemethod Generates VHDL filesfor the circuitimplementationofexact MPC controller. More solutions are available, the choiceisperformedbased on circuitspecifications Latency, multipliers, memory occup. synthesize CIRCUIT SPECS. VHDL files

7. CONTROL APPROXIMATION pwasApproximation Approximates the PWAG controller with a Piece-Wise Affine functiondefinedover a simplicialpartition, byimposingconstraints. LINEAR SYSTEM CONSTRAINTS PWAG APPROXIMATE pwarApproximation Approximates the PWAG controller with a Piece-Wise Affine functiondefinedover a rectangularpartition, byimposingconstraints. PWAS / PWAR

8. APPROXIMATION BENEFITS Regularityof the partition Fast circuitcomputation Stability can beproven (a posteriori) PWAG/PWAS/ PWAR STABILITY TEST

9. CIRCUIT DESIGN getCircuitPerformances Gets information aboutcircuitperformances in advance, alsobeforegenerating the approximatecontrolfunctionitself. PWAS/PWAR getCircuitPerformances Latency, multipliers, memory occup. synthesizemethod Generates VHDL filesfor the circuitimplementationofapproximate MPC controller. synthesize CIRCUIT SPECS. VHDL files

10. CLOSED-LOOP SIMULATION generateSimulinkModel Generates a Simulinkmodelof the closed-loop system, in which the controliscomputedbysimulating the VHDL files (delays and fixedpointrepresentationeffects are takeninto account) Requires Xilinx System Generator PLANT PWAG / PWAS / PWAR VHDL files GENERATE SIMULINK MODEL

11. VIRTUAL SENSOR DESIGN Unmeasurable output z PLANT Inputs u Measurableoutputs y VIRTUAL SENSOR Estimated unmeasurable output z Fast Small Low-power Low-cost

12. VIRTUAL SENSOR THEORY

13. GOAL OF THE TOOLBOX (2) Virtual sensors design DATASET SENSOR SPECS. FPGA/ASIC IMPLEMENTATION VALIDATION CIRCUIT SPECS. DIGITAL CIRCUIT

14. VIRTUAL SENSOR DESIGN identify Identify a PWAS virtualsensorstartingfrommeasuresof u, y and z TRAINING DATASET SENSOR SPECS. IDENTIFY The estimationof z isperformedbycomputing the valueof a PWAS functionof u, y and the estimated z at previoustimeinstants VIRTUAL SENSOR

15. VIRTUAL SENSOR VALIDATION validate Validates the virtualsensor on a test set toseeif the estimationis accurate VIRTUAL SENSOR TEST DATASET VALIDATE

16. VIRTUAL SENSOR CIRCUIT synthesizemethod Generates VHDL filesfor the circuitimplementationof PWAS virtualsensor. More solutions are available, the choiceisperformedbased on circuitspecifications VIRTUAL SENSOR CIRCUIT SPECS. synthesize VHDL files