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DRIE for TSVs. Group 2 Sasha Hoshian, Mikko Kataja, Ville Liimatainen, Mohammadreza Soleymaniha. From RIE to DRIE. High aspect ratio structures needed (e.g TSVs, MEMS...) Normal RIE too slow Increase power and pressure Etching becomes more isotropic Damage to sidewalls DRIE.
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DRIE for TSVs Group 2 Sasha Hoshian, Mikko Kataja, Ville Liimatainen, Mohammadreza Soleymaniha
From RIE to DRIE • High aspect ratio structures needed (e.g TSVs, MEMS...) • Normal RIE too slow • Increase power and pressure • Etching becomes more isotropic • Damage to sidewalls DRIE
Bosch process • Repeating two phases: • Etching (after ion bombardment) • Nearly isotropic plasma etch • E.g SF6 for silicon • Passivation • Protects the substrate from etching • E.g. C4F8 Etch Deposit passivation Etch
Cryogenic process • Low temperature (< -100°C) • Slows down isotropic etching reactions • Simultaneous etching and passivation • E.g. SF6 / O2 plasma • Smooth sidewalls
3D integration • Interconnect lengths can be reduced by using the 3rd dimension • Advantages of TSVs • Small size and high density • High speed signal propagation and processing • Low power consumption • Many input-output terminals • Multi-functionality and high performance
TSV (Through silicon vias) • TSVs provide interconnects between wafers • Possible conductor materials include metals such as Cu and Al and doped Si.
TSV considerations • Aspect ratio • Reducing the TSV diameter minimizes lost space on chip. • Sidewall profile • Slighly sloped profile helps with filling. • Etch rate • Determines the manufacturing throughput • Conductor material • Material choice may restrict the subsequent processing temperature.
Available technology • Some other DRIE manufacturers: • TEL, ULVAC, Panasonic, Maxis, AMAT…
Conclusions • Aspect ratio • Bosch has better aspect ratio • Etch rate • Bosch is faster • Sidewalls • Cryo gives smoother sidewalls • Both processes allow both vertical and sloped profile • Temperature • Low temperature in cryo may cause problems with mask materials