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Real Time Scheduling Issues in Powertrain Controls James B. Kolhoff Engineering Group Manager Front Wheel Drive Controller Team General Motors Powertrain. Overview of Presentation. GMPT Electronics Integration & SW - Group & Product Scheduling Requirements and Problem Solution

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Overview of Presentation

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  1. Real Time Scheduling Issues in Powertrain ControlsJames B. KolhoffEngineering Group ManagerFront Wheel Drive Controller TeamGeneral Motors Powertrain

  2. Overview of Presentation • GMPT Electronics Integration & SW - Group & Product • Scheduling Requirements and Problem • Solution • Distributed architecture • Next step

  3. Group and Product Background Group GMPT is a division of General Motors, responsible for engine, transmission, powertrain controls engineering and manufacture Electronics Integration & Software (EI&S) is a product engineering team responsible for the electronics and software for powertrain controls Product EI&S end product is an embedded microprocessor control module(s) that controls and diagnoses engine, transmission, and vehicle functions. • Multiple end products (ECM, TCM, PCM) with different feature content (internal GM and external customers) • Multiple controller and compiler suppliers • Other vehicle module interfaces • Development and production tool interfaces • Controller: 32bit uc, 1Mb ROM, 150+ pins

  4. Scheduling requirements • Two categories of task - time synchronous, engine event synchronous • Time: 3.125ms, 6.25, 12.5, 25, 100 ms • Engine: crankshaft synchronous, cam synchronous • The engine event tasks cause the processing power to be consumed in direct proportion to engine speed • Engine event synchronous tasks have harder deadlines and higher priorities than time based tasks • 8 cylinder engine engine, event sw task execution time 1ms • 600 rpm: 25ms event rate, 4% available processor thruput • 7000 rpm: 2.1ms event rate, 48% available processor thruput

  5. Task scheduling

  6. Scheduling Problems • Most critical scheduling problem was task deadlines missed at higher engine speeds • Basic root cause: Limited processing power • Using low cost microprocessor • Low clock speed for EMC performance • Too late in program to make processor change • ROM limited so we can’t do ROM tradeoffs for thruput • Fixed point math operations • Library not optimized for performance • Requirement of ANSI-C for code portability • Not designed for performance • SW Design and Coding Standards • Designed for reuse and readability, not performance

  7. Solutions applied • Re-design software for improved efficiency • Significant work effort, potential loss of function, repeat verification • Optimize libraries to take advantage of processor specifics • Significant work effort, reduces reuse, increases verification requirements • Revise coding standards to maximize efficiency • At the expense of portability and reuse • Rework and revalidation across large number of engineers • Biggest bang for the buck - dynamic scheduling • Can localize redesign at areas of maximum benefit • Time tasks slower than 25ms rates are insignificant to the problem

  8. Dynamic scheduling • Objective: Reduce execution requirements at higher engine speeds • Difficult to individually disable or redesign functions • Developed engine speed zones approach • Different function level in each zone • Simplifies coordination of scheduling change • In middle engine speed range, divide function across multiple engine events • Balance load across multiple cylinder events • At highest engine speeds, significantly simplify some functions • Engine states don’t change every cylinder

  9. Effect of Dynamic Scheduling

  10. Legend Electrical System Control Module Electrical Interface Controller System Topologies Powertrain Control Module Engine/Transmission Control Modules Engine Electrical System Engine Electrical System ECM Vehicle Electrical System Vehicle Electrical System PCM Transmission Electrical System Transmission Electrical System TCM

  11. Distributed architecture • Controller systems architecture for GMPT is changing to separate engine controller / transmission controller • For reasons of powertrain portfolio management • This architecture reduces the computing power needed in any single controller • Scheduling and thruput still needed to be carefully managed • System partitioning plays a key role • Inter-module Communications uses some of the freed up thruput

  12. Future • Microprocessor power has grown dramatically over the past 5 years • At the same time, costs have fallen dramatically for this power • With the microprocessors available for the projects planned, thruput will not be the significant problem it has been in the past • Simulation and schedule/thruput budgets are the next steps

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